video_core: Reduce nihstro includes in headers. (#6626)

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Steveice10 2023-06-19 15:49:22 -07:00 committed by GitHub
parent 3faddd5e03
commit 03dbdfc12f
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4 changed files with 41 additions and 37 deletions

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@ -16,6 +16,7 @@
namespace OpenGL::ShaderDecompiler {
using nihstro::DestRegister;
using nihstro::Instruction;
using nihstro::OpCode;
using nihstro::RegisterType;

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@ -12,7 +12,6 @@
#include <boost/serialization/access.hpp>
#include <boost/serialization/array.hpp>
#include <boost/serialization/base_object.hpp>
#include <nihstro/shader_bytecode.h>
#include "common/assert.h"
#include "common/common_funcs.h"
#include "common/common_types.h"
@ -22,10 +21,6 @@
#include "video_core/regs_rasterizer.h"
#include "video_core/regs_shader.h"
using nihstro::DestRegister;
using nihstro::RegisterType;
using nihstro::SourceRegister;
namespace Pica::Shader {
constexpr unsigned MAX_PROGRAM_CODE_LENGTH = 4096;
@ -164,36 +159,19 @@ struct UnitState {
GSEmitter* emitter_ptr;
static std::size_t InputOffset(const SourceRegister& reg) {
switch (reg.GetRegisterType()) {
case RegisterType::Input:
static std::size_t InputOffset(int register_index) {
return offsetof(UnitState, registers.input) +
reg.GetIndex() * sizeof(Common::Vec4<float24>);
case RegisterType::Temporary:
return offsetof(UnitState, registers.temporary) +
reg.GetIndex() * sizeof(Common::Vec4<float24>);
default:
UNREACHABLE();
return 0;
}
register_index * sizeof(Common::Vec4<float24>);
}
static std::size_t OutputOffset(const DestRegister& reg) {
switch (reg.GetRegisterType()) {
case RegisterType::Output:
static std::size_t OutputOffset(int register_index) {
return offsetof(UnitState, registers.output) +
reg.GetIndex() * sizeof(Common::Vec4<float24>);
case RegisterType::Temporary:
return offsetof(UnitState, registers.temporary) +
reg.GetIndex() * sizeof(Common::Vec4<float24>);
default:
UNREACHABLE();
return 0;
register_index * sizeof(Common::Vec4<float24>);
}
static std::size_t TemporaryOffset(int register_index) {
return offsetof(UnitState, registers.temporary) +
register_index * sizeof(Common::Vec4<float24>);
}
/**

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@ -29,6 +29,9 @@ using Xbyak::Reg32;
using Xbyak::Reg64;
using Xbyak::Xmm;
using nihstro::DestRegister;
using nihstro::RegisterType;
namespace Pica::Shader {
typedef void (JitShader::*JitFunction)(Instruction instr);
@ -185,13 +188,22 @@ void JitShader::Compile_SwizzleSrc(Instruction instr, unsigned src_num, SourceRe
Xmm dest) {
Reg64 src_ptr;
std::size_t src_offset;
if (src_reg.GetRegisterType() == RegisterType::FloatUniform) {
switch (src_reg.GetRegisterType()) {
case RegisterType::FloatUniform:
src_ptr = UNIFORMS;
src_offset = Uniforms::GetFloatUniformOffset(src_reg.GetIndex());
} else {
break;
case RegisterType::Input:
src_ptr = STATE;
src_offset = UnitState::InputOffset(src_reg);
src_offset = UnitState::InputOffset(src_reg.GetIndex());
break;
case RegisterType::Temporary:
src_ptr = STATE;
src_offset = UnitState::TemporaryOffset(src_reg.GetIndex());
break;
default:
UNREACHABLE_MSG("Encountered unknown source register type: {}", src_reg.GetRegisterType());
break;
}
int src_offset_disp = (int)src_offset;
@ -270,7 +282,19 @@ void JitShader::Compile_DestEnable(Instruction instr, Xmm src) {
SwizzlePattern swiz = {(*swizzle_data)[operand_desc_id]};
std::size_t dest_offset_disp = UnitState::OutputOffset(dest);
std::size_t dest_offset_disp;
switch (dest.GetRegisterType()) {
case RegisterType::Output:
dest_offset_disp = UnitState::OutputOffset(dest.GetIndex());
break;
case RegisterType::Temporary:
dest_offset_disp = UnitState::TemporaryOffset(dest.GetIndex());
break;
default:
UNREACHABLE_MSG("Encountered unknown destination register type: {}",
dest.GetRegisterType());
break;
}
// If all components are enabled, write the result to the destination register
if (swiz.dest_mask == NO_DEST_REG_MASK) {

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@ -20,6 +20,7 @@
using nihstro::Instruction;
using nihstro::OpCode;
using nihstro::SourceRegister;
using nihstro::SwizzlePattern;
namespace Pica::Shader {