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GPU: Add display transfer configuration.
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ec9511e1db
commit
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@ -108,6 +108,31 @@ inline void Read(T &var, const u32 addr) {
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var = g_regs.framebuffer_sub_right_1;
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var = g_regs.framebuffer_sub_right_1;
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break;
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break;
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case Registers::DisplayInputBufferAddr:
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var = g_regs.display_transfer.input_address;
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break;
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case Registers::DisplayOutputBufferAddr:
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var = g_regs.display_transfer.output_address;
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break;
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case Registers::DisplayOutputBufferSize:
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var = g_regs.display_transfer.output_size;
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break;
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case Registers::DisplayInputBufferSize:
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var = g_regs.display_transfer.input_size;
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break;
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case Registers::DisplayTransferFlags:
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var = g_regs.display_transfer.flags;
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break;
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// Not sure if this is supposed to be readable
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case Registers::DisplayTriggerTransfer:
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var = g_regs.display_transfer.trigger;
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break;
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case Registers::CommandListSize:
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case Registers::CommandListSize:
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var = g_regs.command_list_size;
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var = g_regs.command_list_size;
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break;
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break;
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@ -129,6 +154,33 @@ inline void Read(T &var, const u32 addr) {
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template <typename T>
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template <typename T>
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inline void Write(u32 addr, const T data) {
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inline void Write(u32 addr, const T data) {
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switch (static_cast<Registers::Id>(addr)) {
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switch (static_cast<Registers::Id>(addr)) {
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case Registers::DisplayInputBufferAddr:
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g_regs.display_transfer.input_address = data;
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break;
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case Registers::DisplayOutputBufferAddr:
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g_regs.display_transfer.output_address = data;
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break;
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case Registers::DisplayOutputBufferSize:
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g_regs.display_transfer.output_size = data;
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break;
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case Registers::DisplayInputBufferSize:
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g_regs.display_transfer.input_size = data;
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break;
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case Registers::DisplayTransferFlags:
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g_regs.display_transfer.flags = data;
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break;
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case Registers::DisplayTriggerTransfer:
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g_regs.display_transfer.trigger = data;
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if (g_regs.display_transfer.trigger & 1) {
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// TODO: Perform display transfer!
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}
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break;
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case Registers::CommandListSize:
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case Registers::CommandListSize:
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g_regs.command_list_size = data;
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g_regs.command_list_size = data;
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break;
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break;
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@ -5,6 +5,7 @@
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#pragma once
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#pragma once
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#include "common/common_types.h"
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#include "common/common_types.h"
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#include "common/bit_field.h"
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namespace GPU {
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namespace GPU {
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@ -44,6 +45,45 @@ struct Registers {
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u32 framebuffer_sub_right_1;
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u32 framebuffer_sub_right_1;
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u32 framebuffer_sub_right_2;
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u32 framebuffer_sub_right_2;
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struct {
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u32 input_address;
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u32 output_address;
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inline u32 GetPhysicalInputAddress() const {
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return input_address * 8;
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}
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inline u32 GetPhysicalOutputAddress() const {
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return output_address * 8;
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}
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union {
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u32 output_size;
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BitField< 0, 16, u32> output_width;
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BitField<16, 16, u32> output_height;
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};
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union {
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u32 input_size;
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BitField< 0, 16, u32> input_width;
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BitField<16, 16, u32> input_height;
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};
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union {
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u32 flags;
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BitField< 0, 1, u32> flip_data;
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BitField< 8, 3, u32> input_format;
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BitField<12, 3, u32> output_format;
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BitField<16, 1, u32> output_tiled;
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};
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u32 unknown;
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u32 trigger;
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} display_transfer;
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u32 command_list_size;
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u32 command_list_size;
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u32 command_list_address;
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u32 command_list_address;
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u32 command_processing_enabled;
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u32 command_processing_enabled;
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