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Merge pull request #838 from lioncash/thumb
arm_dyncom_thumb: Implement missing instructions.
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commit
1974da272d
@ -274,9 +274,46 @@ tdstate thumb_translate(u32 addr, u32 instr, u32* ainstr, u32* inst_size) {
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? 0xE24DDF00 // SUB
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: 0xE28DDF00) // ADD
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|(tinstr & 0x007F); // off7
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} else if ((tinstr & 0x0F00) == 0x0e00)
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*ainstr = 0xEF000000 | 0x180000; // base | BKPT mask
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else {
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} else if ((tinstr & 0x0F00) == 0x0e00) {
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// BKPT
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*ainstr = 0xEF000000 // base
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| BITS(tinstr, 0, 3) // imm4 field;
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| (BITS(tinstr, 4, 7) << 8); // beginning 4 bits of imm12
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} else if ((tinstr & 0x0F00) == 0x0200) {
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static const ARMword subset[4] = {
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0xE6BF0070, // SXTH
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0xE6AF0070, // SXTB
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0xE6FF0070, // UXTH
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0xE6EF0070, // UXTB
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};
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*ainstr = subset[BITS(tinstr, 6, 7)] // base
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| (BITS(tinstr, 0, 2) << 12) // Rd
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| BITS(tinstr, 3, 5); // Rm
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} else if ((tinstr & 0x0F00) == 0x600) {
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if (BIT(tinstr, 5) == 0) {
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// SETEND
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*ainstr = 0xF1010000 // base
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| (BIT(tinstr, 3) << 9); // endian specifier
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} else {
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// CPS
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*ainstr = 0xF1080000 // base
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| (BIT(tinstr, 0) << 6) // fiq bit
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| (BIT(tinstr, 1) << 7) // irq bit
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| (BIT(tinstr, 2) << 8) // abort bit
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| (BIT(tinstr, 4) << 18); // enable bit
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}
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} else if ((tinstr & 0x0F00) == 0x0a00) {
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static const ARMword subset[3] = {
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0xE6BF0F30, // REV
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0xE6BF0FB0, // REV16
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0xE6FF0FB0, // REVSH
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};
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*ainstr = subset[BITS(tinstr, 6, 7)] // base
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| (BITS(tinstr, 0, 2) << 12) // Rd
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| BITS(tinstr, 3, 5); // Rm
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} else {
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static const ARMword subset[4] = {
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0xE92D0000, // STMDB sp!,{rlist}
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0xE92D4000, // STMDB sp!,{rlist,lr}
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