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dynarmic: Implement ARM CPU interface.
This commit is contained in:
parent
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commit
1976a2d773
@ -1,6 +1,7 @@
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set(SRCS
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set(SRCS
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arm/disassembler/arm_disasm.cpp
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arm/disassembler/arm_disasm.cpp
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arm/disassembler/load_symbol_map.cpp
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arm/disassembler/load_symbol_map.cpp
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arm/dynarmic/arm_dynarmic.cpp
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arm/dyncom/arm_dyncom.cpp
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arm/dyncom/arm_dyncom.cpp
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arm/dyncom/arm_dyncom_dec.cpp
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arm/dyncom/arm_dyncom_dec.cpp
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arm/dyncom/arm_dyncom_interpreter.cpp
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arm/dyncom/arm_dyncom_interpreter.cpp
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@ -141,6 +142,7 @@ set(HEADERS
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arm/arm_interface.h
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arm/arm_interface.h
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arm/disassembler/arm_disasm.h
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arm/disassembler/arm_disasm.h
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arm/disassembler/load_symbol_map.h
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arm/disassembler/load_symbol_map.h
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arm/dynarmic/arm_dynarmic.h
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arm/dyncom/arm_dyncom.h
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arm/dyncom/arm_dyncom.h
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arm/dyncom/arm_dyncom_dec.h
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arm/dyncom/arm_dyncom_dec.h
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arm/dyncom/arm_dyncom_interpreter.h
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arm/dyncom/arm_dyncom_interpreter.h
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@ -285,6 +287,10 @@ set(HEADERS
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system.h
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system.h
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)
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)
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include_directories(../../externals/dynarmic/include)
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create_directory_groups(${SRCS} ${HEADERS})
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create_directory_groups(${SRCS} ${HEADERS})
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add_library(core STATIC ${SRCS} ${HEADERS})
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add_library(core STATIC ${SRCS} ${HEADERS})
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target_link_libraries(core dynarmic)
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176
src/core/arm/dynarmic/arm_dynarmic.cpp
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176
src/core/arm/dynarmic/arm_dynarmic.cpp
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// Copyright 2016 Citra Emulator Project
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// Licensed under GPLv2 or any later version
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// Refer to the license.txt file included.
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#include "common/assert.h"
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#include "common/microprofile.h"
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#include <dynarmic/dynarmic.h>
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#include "core/arm/dynarmic/arm_dynarmic.h"
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#include "core/arm/dyncom/arm_dyncom_interpreter.h"
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#include "core/core.h"
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#include "core/core_timing.h"
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#include "core/hle/svc.h"
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#include "core/memory.h"
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static void InterpreterFallback(u32 pc, Dynarmic::Jit* jit, void* user_arg) {
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ARMul_State* state = static_cast<ARMul_State*>(user_arg);
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state->Reg = jit->Regs();
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state->Cpsr = jit->Cpsr();
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state->Reg[15] = pc;
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state->ExtReg = jit->ExtRegs();
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state->VFP[VFP_FPSCR] = jit->Fpscr();
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state->NumInstrsToExecute = 1;
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InterpreterMainLoop(state);
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bool is_thumb = (state->Cpsr & (1 << 5)) != 0;
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state->Reg[15] &= (is_thumb ? 0xFFFFFFFE : 0xFFFFFFFC);
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jit->Regs() = state->Reg;
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jit->Cpsr() = state->Cpsr;
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jit->ExtRegs() = state->ExtReg;
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jit->SetFpscr(state->VFP[VFP_FPSCR]);
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}
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static bool IsReadOnlyMemory(u32 vaddr) {
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// TODO(bunnei): ImplementMe
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return false;
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}
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static Dynarmic::UserCallbacks GetUserCallbacks(ARMul_State* interpeter_state) {
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Dynarmic::UserCallbacks user_callbacks{};
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user_callbacks.InterpreterFallback = &InterpreterFallback;
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user_callbacks.user_arg = static_cast<void*>(interpeter_state);
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user_callbacks.CallSVC = &SVC::CallSVC;
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user_callbacks.IsReadOnlyMemory = &IsReadOnlyMemory;
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user_callbacks.MemoryRead8 = &Memory::Read8;
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user_callbacks.MemoryRead16 = &Memory::Read16;
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user_callbacks.MemoryRead32 = &Memory::Read32;
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user_callbacks.MemoryRead64 = &Memory::Read64;
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user_callbacks.MemoryWrite8 = &Memory::Write8;
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user_callbacks.MemoryWrite16 = &Memory::Write16;
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user_callbacks.MemoryWrite32 = &Memory::Write32;
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user_callbacks.MemoryWrite64 = &Memory::Write64;
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return user_callbacks;
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}
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ARM_Dynarmic::ARM_Dynarmic(PrivilegeMode initial_mode) {
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interpreter_state = std::make_unique<ARMul_State>(initial_mode);
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jit = std::make_unique<Dynarmic::Jit>(GetUserCallbacks(interpreter_state.get()));
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}
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void ARM_Dynarmic::SetPC(u32 pc) {
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jit->Regs()[15] = pc;
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}
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u32 ARM_Dynarmic::GetPC() const {
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return jit->Regs()[15];
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}
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u32 ARM_Dynarmic::GetReg(int index) const {
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return jit->Regs()[index];
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}
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void ARM_Dynarmic::SetReg(int index, u32 value) {
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jit->Regs()[index] = value;
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}
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u32 ARM_Dynarmic::GetVFPReg(int index) const {
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return jit->ExtRegs()[index];
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}
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void ARM_Dynarmic::SetVFPReg(int index, u32 value) {
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jit->ExtRegs()[index] = value;
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}
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u32 ARM_Dynarmic::GetVFPSystemReg(VFPSystemRegister reg) const {
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// TODO(bunnei): ImplementMe
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UNIMPLEMENTED();
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return 0;
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}
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void ARM_Dynarmic::SetVFPSystemReg(VFPSystemRegister reg, u32 value) {
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// TODO(bunnei): ImplementMe
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UNIMPLEMENTED();
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}
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u32 ARM_Dynarmic::GetCPSR() const {
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return jit->Cpsr();
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}
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void ARM_Dynarmic::SetCPSR(u32 cpsr) {
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jit->Cpsr() = cpsr;
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}
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u32 ARM_Dynarmic::GetCP15Register(CP15Register reg) {
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return interpreter_state->CP15[reg];
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}
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void ARM_Dynarmic::SetCP15Register(CP15Register reg, u32 value) {
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interpreter_state->CP15[reg] = value;
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}
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void ARM_Dynarmic::AddTicks(u64 ticks) {
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down_count -= ticks;
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if (down_count < 0) {
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CoreTiming::Advance();
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}
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}
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MICROPROFILE_DEFINE(ARM_Jit, "ARM JIT", "ARM JIT", MP_RGB(255, 64, 64));
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void ARM_Dynarmic::ExecuteInstructions(int num_instructions) {
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MICROPROFILE_SCOPE(ARM_Jit);
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jit->Run(static_cast<unsigned>(num_instructions));
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AddTicks(num_instructions);
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}
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void ARM_Dynarmic::ResetContext(Core::ThreadContext& context, u32 stack_top, u32 entry_point, u32 arg) {
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memset(&context, 0, sizeof(Core::ThreadContext));
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context.cpu_registers[0] = arg;
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context.pc = entry_point;
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context.sp = stack_top;
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context.cpsr = USER32MODE | ((entry_point & 1) << 5); // Usermode and THUMB mode
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}
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void ARM_Dynarmic::SaveContext(Core::ThreadContext& ctx) {
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memcpy(ctx.cpu_registers, jit->Regs().data(), sizeof(ctx.cpu_registers));
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memcpy(ctx.fpu_registers, jit->ExtRegs().data(), sizeof(ctx.fpu_registers));
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ctx.sp = jit->Regs()[13];
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ctx.lr = jit->Regs()[14];
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ctx.pc = jit->Regs()[15];
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ctx.cpsr = jit->Cpsr();
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ctx.fpscr = jit->Fpscr();
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ctx.fpexc = interpreter_state->VFP[VFP_FPEXC];
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}
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void ARM_Dynarmic::LoadContext(const Core::ThreadContext& ctx) {
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memcpy(jit->Regs().data(), ctx.cpu_registers, sizeof(ctx.cpu_registers));
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memcpy(jit->ExtRegs().data(), ctx.fpu_registers, sizeof(ctx.fpu_registers));
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jit->Regs()[13] = ctx.sp;
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jit->Regs()[14] = ctx.lr;
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jit->Regs()[15] = ctx.pc;
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jit->Cpsr() = ctx.cpsr;
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jit->SetFpscr(ctx.fpscr);
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interpreter_state->VFP[VFP_FPEXC] = ctx.fpexc;
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}
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void ARM_Dynarmic::PrepareReschedule() {
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if (jit->IsExecuting()) {
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jit->HaltExecution();
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}
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}
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void ARM_Dynarmic::ClearInstructionCache() {
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jit->ClearCache();
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}
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51
src/core/arm/dynarmic/arm_dynarmic.h
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51
src/core/arm/dynarmic/arm_dynarmic.h
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@ -0,0 +1,51 @@
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// Copyright 2016 Citra Emulator Project
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// Licensed under GPLv2 or any later version
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// Refer to the license.txt file included.
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#pragma once
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#include <memory>
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#include <dynarmic/dynarmic.h>
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#include "common/common_types.h"
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#include "core/arm/arm_interface.h"
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#include "core/arm/skyeye_common/armstate.h"
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namespace Core {
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struct ThreadContext;
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}
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class ARM_Dynarmic final : virtual public ARM_Interface {
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public:
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ARM_Dynarmic(PrivilegeMode initial_mode);
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void SetPC(u32 pc) override;
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u32 GetPC() const override;
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u32 GetReg(int index) const override;
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void SetReg(int index, u32 value) override;
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u32 GetVFPReg(int index) const override;
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void SetVFPReg(int index, u32 value) override;
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u32 GetVFPSystemReg(VFPSystemRegister reg) const override;
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void SetVFPSystemReg(VFPSystemRegister reg, u32 value) override;
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u32 GetCPSR() const override;
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void SetCPSR(u32 cpsr) override;
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u32 GetCP15Register(CP15Register reg) override;
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void SetCP15Register(CP15Register reg, u32 value) override;
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void AddTicks(u64 ticks) override;
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void ResetContext(Core::ThreadContext& context, u32 stack_top, u32 entry_point, u32 arg) override;
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void SaveContext(Core::ThreadContext& ctx) override;
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void LoadContext(const Core::ThreadContext& ctx) override;
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void PrepareReschedule() override;
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void ExecuteInstructions(int num_instructions) override;
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void ClearInstructionCache() override;
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private:
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std::unique_ptr<Dynarmic::Jit> jit;
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std::unique_ptr<ARMul_State> interpreter_state;
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};
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