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Merge pull request #314 from lioncash/qsax-qasx
armemu: Implement QASX and QSAX
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commit
1c50a036dd
@ -5882,8 +5882,10 @@ L_stm_s_takeabort:
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printf("Unhandled v6 insn: %08x", BITS(20, 27));
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}
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break;
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case 0x62: // QSUB16 and QADD16
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if ((instr & 0xFF0) == 0xf70 || (instr & 0xFF0) == 0xf10) {
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case 0x62: // QADD16, QASX, QSAX, and QSUB16
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if ((instr & 0xFF0) == 0xf10 || (instr & 0xFF0) == 0xf30 ||
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(instr & 0xFF0) == 0xf50 || (instr & 0xFF0) == 0xf70)
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{
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const u8 rd_idx = BITS(12, 15);
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const u8 rn_idx = BITS(16, 19);
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const u8 rm_idx = BITS(0, 3);
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@ -5895,15 +5897,26 @@ L_stm_s_takeabort:
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s32 lo_result;
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s32 hi_result;
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// QSUB16
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if ((instr & 0xFF0) == 0xf70) {
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lo_result = (rn_lo - rm_lo);
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hi_result = (rn_hi - rm_hi);
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}
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else { // QADD16
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// QADD16
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if ((instr & 0xFF0) == 0xf10) {
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lo_result = (rn_lo + rm_lo);
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hi_result = (rn_hi + rm_hi);
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}
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// QASX
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else if ((instr & 0xFF0) == 0xf30) {
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lo_result = (rn_lo - rm_hi);
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hi_result = (rn_hi + rm_lo);
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}
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// QSAX
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else if ((instr & 0xFF0) == 0xf50) {
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lo_result = (rn_lo + rm_hi);
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hi_result = (rn_hi - rm_lo);
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}
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// QSUB16
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else {
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lo_result = (rn_lo - rm_lo);
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hi_result = (rn_hi - rm_hi);
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}
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if (lo_result > 0x7FFF)
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lo_result = 0x7FFF;
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