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ARM_Interface: Implement PageTableChanged
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@ -41,6 +41,9 @@ public:
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/// Clear all instruction cache
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/// Clear all instruction cache
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virtual void ClearInstructionCache() = 0;
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virtual void ClearInstructionCache() = 0;
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/// Notify CPU emulation that page tables have changed
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virtual void PageTableChanged() = 0;
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/**
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/**
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* Set the Program Counter to an address
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* Set the Program Counter to an address
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* @param addr Address to set PC to
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* @param addr Address to set PC to
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@ -41,7 +41,7 @@ static bool IsReadOnlyMemory(u32 vaddr) {
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}
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}
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static Dynarmic::UserCallbacks GetUserCallbacks(
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static Dynarmic::UserCallbacks GetUserCallbacks(
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const std::shared_ptr<ARMul_State>& interpeter_state) {
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const std::shared_ptr<ARMul_State>& interpeter_state, Memory::PageTable* current_page_table) {
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Dynarmic::UserCallbacks user_callbacks{};
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Dynarmic::UserCallbacks user_callbacks{};
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user_callbacks.InterpreterFallback = &InterpreterFallback;
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user_callbacks.InterpreterFallback = &InterpreterFallback;
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user_callbacks.user_arg = static_cast<void*>(interpeter_state.get());
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user_callbacks.user_arg = static_cast<void*>(interpeter_state.get());
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@ -56,16 +56,14 @@ static Dynarmic::UserCallbacks GetUserCallbacks(
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user_callbacks.memory.Write16 = &Memory::Write16;
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user_callbacks.memory.Write16 = &Memory::Write16;
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user_callbacks.memory.Write32 = &Memory::Write32;
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user_callbacks.memory.Write32 = &Memory::Write32;
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user_callbacks.memory.Write64 = &Memory::Write64;
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user_callbacks.memory.Write64 = &Memory::Write64;
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// TODO(Subv): Re-add the page table pointers once dynarmic supports switching page tables at
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user_callbacks.page_table = ¤t_page_table->pointers;
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// runtime.
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user_callbacks.page_table = nullptr;
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user_callbacks.coprocessors[15] = std::make_shared<DynarmicCP15>(interpeter_state);
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user_callbacks.coprocessors[15] = std::make_shared<DynarmicCP15>(interpeter_state);
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return user_callbacks;
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return user_callbacks;
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}
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}
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ARM_Dynarmic::ARM_Dynarmic(PrivilegeMode initial_mode) {
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ARM_Dynarmic::ARM_Dynarmic(PrivilegeMode initial_mode) {
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interpreter_state = std::make_shared<ARMul_State>(initial_mode);
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interpreter_state = std::make_shared<ARMul_State>(initial_mode);
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jit = std::make_unique<Dynarmic::Jit>(GetUserCallbacks(interpreter_state));
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PageTableChanged();
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}
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}
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void ARM_Dynarmic::SetPC(u32 pc) {
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void ARM_Dynarmic::SetPC(u32 pc) {
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@ -136,6 +134,7 @@ void ARM_Dynarmic::AddTicks(u64 ticks) {
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MICROPROFILE_DEFINE(ARM_Jit, "ARM JIT", "ARM JIT", MP_RGB(255, 64, 64));
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MICROPROFILE_DEFINE(ARM_Jit, "ARM JIT", "ARM JIT", MP_RGB(255, 64, 64));
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void ARM_Dynarmic::ExecuteInstructions(int num_instructions) {
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void ARM_Dynarmic::ExecuteInstructions(int num_instructions) {
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ASSERT(Memory::GetCurrentPageTable() == current_page_table);
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MICROPROFILE_SCOPE(ARM_Jit);
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MICROPROFILE_SCOPE(ARM_Jit);
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std::size_t ticks_executed = jit->Run(static_cast<unsigned>(num_instructions));
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std::size_t ticks_executed = jit->Run(static_cast<unsigned>(num_instructions));
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@ -178,3 +177,16 @@ void ARM_Dynarmic::PrepareReschedule() {
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void ARM_Dynarmic::ClearInstructionCache() {
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void ARM_Dynarmic::ClearInstructionCache() {
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jit->ClearCache();
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jit->ClearCache();
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}
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}
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void ARM_Dynarmic::PageTableChanged() {
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current_page_table = Memory::GetCurrentPageTable();
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auto iter = jits.find(current_page_table);
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if (iter != jits.end()) {
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jit = iter->second.get();
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return;
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}
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jit = new Dynarmic::Jit(GetUserCallbacks(interpreter_state, current_page_table));
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jits.emplace(current_page_table, std::unique_ptr<Dynarmic::Jit>(jit));
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}
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@ -4,12 +4,17 @@
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#pragma once
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#pragma once
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#include <map>
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#include <memory>
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#include <memory>
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#include <dynarmic/dynarmic.h>
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#include <dynarmic/dynarmic.h>
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#include "common/common_types.h"
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#include "common/common_types.h"
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#include "core/arm/arm_interface.h"
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#include "core/arm/arm_interface.h"
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#include "core/arm/skyeye_common/armstate.h"
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#include "core/arm/skyeye_common/armstate.h"
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namespace Memory {
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struct PageTable;
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} // namespace Memory
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class ARM_Dynarmic final : public ARM_Interface {
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class ARM_Dynarmic final : public ARM_Interface {
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public:
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public:
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ARM_Dynarmic(PrivilegeMode initial_mode);
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ARM_Dynarmic(PrivilegeMode initial_mode);
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@ -36,8 +41,11 @@ public:
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void ExecuteInstructions(int num_instructions) override;
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void ExecuteInstructions(int num_instructions) override;
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void ClearInstructionCache() override;
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void ClearInstructionCache() override;
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void PageTableChanged() override;
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private:
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private:
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std::unique_ptr<Dynarmic::Jit> jit;
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Dynarmic::Jit* jit = nullptr;
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Memory::PageTable* current_page_table = nullptr;
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std::map<Memory::PageTable*, std::unique_ptr<Dynarmic::Jit>> jits;
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std::shared_ptr<ARMul_State> interpreter_state;
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std::shared_ptr<ARMul_State> interpreter_state;
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};
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};
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@ -25,6 +25,10 @@ void ARM_DynCom::ClearInstructionCache() {
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trans_cache_buf_top = 0;
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trans_cache_buf_top = 0;
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}
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}
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void ARM_DynCom::PageTableChanged() {
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ClearInstructionCache();
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}
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void ARM_DynCom::SetPC(u32 pc) {
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void ARM_DynCom::SetPC(u32 pc) {
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state->Reg[15] = pc;
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state->Reg[15] = pc;
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}
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}
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@ -16,6 +16,7 @@ public:
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~ARM_DynCom();
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~ARM_DynCom();
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void ClearInstructionCache() override;
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void ClearInstructionCache() override;
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void PageTableChanged() override;
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void SetPC(u32 pc) override;
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void SetPC(u32 pc) override;
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u32 GetPC() const override;
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u32 GetPC() const override;
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@ -9,6 +9,8 @@
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#include "common/common_types.h"
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#include "common/common_types.h"
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#include "common/logging/log.h"
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#include "common/logging/log.h"
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#include "common/swap.h"
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#include "common/swap.h"
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#include "core/arm/arm_interface.h"
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#include "core/core.h"
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#include "core/hle/kernel/memory.h"
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#include "core/hle/kernel/memory.h"
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#include "core/hle/kernel/process.h"
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#include "core/hle/kernel/process.h"
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#include "core/hle/lock.h"
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#include "core/hle/lock.h"
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@ -26,6 +28,9 @@ static PageTable* current_page_table = nullptr;
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void SetCurrentPageTable(PageTable* page_table) {
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void SetCurrentPageTable(PageTable* page_table) {
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current_page_table = page_table;
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current_page_table = page_table;
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if (Core::System::GetInstance().IsPoweredOn()) {
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Core::CPU().PageTableChanged();
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}
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}
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}
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PageTable* GetCurrentPageTable() {
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PageTable* GetCurrentPageTable() {
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