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https://github.com/citra-mirror/citra.git
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ARM: Synchronize Citra's SkyEye core with 3dmoo's.
This commit is contained in:
parent
866d2a62e9
commit
77fc029a00
@ -12,6 +12,8 @@ ARM_Interpreter::ARM_Interpreter() {
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state = new ARMul_State;
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state = new ARMul_State;
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ARMul_EmulateInit();
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ARMul_EmulateInit();
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memset(state, 0, sizeof(ARMul_State));
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ARMul_NewState(state);
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ARMul_NewState(state);
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state->abort_model = 0;
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state->abort_model = 0;
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@ -23,12 +25,14 @@ ARM_Interpreter::ARM_Interpreter() {
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mmu_init(state);
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mmu_init(state);
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// Reset the core to initial state
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// Reset the core to initial state
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ARMul_CoProInit(state);
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ARMul_Reset(state);
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ARMul_Reset(state);
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state->NextInstr = 0;
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state->NextInstr = RESUME;
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state->Emulate = 3;
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state->Emulate = 3;
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state->pc = state->Reg[15] = 0x00000000;
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state->pc = state->Reg[15] = 0x00000000;
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state->Reg[13] = 0x10000000; // Set stack pointer to the top of the stack
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state->Reg[13] = 0x10000000; // Set stack pointer to the top of the stack
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state->servaddr = 0xFFFF0000;
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}
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}
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ARM_Interpreter::~ARM_Interpreter() {
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ARM_Interpreter::~ARM_Interpreter() {
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@ -278,6 +278,11 @@ struct ARMul_State
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unsigned int NumScycles, NumNcycles, NumIcycles, NumCcycles, NumFcycles; /* emulated cycles used */
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unsigned int NumScycles, NumNcycles, NumIcycles, NumCcycles, NumFcycles; /* emulated cycles used */
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unsigned long long NumInstrs; /* the number of instructions executed */
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unsigned long long NumInstrs; /* the number of instructions executed */
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unsigned NumInstrsToExecute;
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unsigned NumInstrsToExecute;
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ARMword currentexaddr;
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ARMword currentexval;
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ARMword servaddr;
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unsigned NextInstr;
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unsigned NextInstr;
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unsigned VectorCatch; /* caught exception mask */
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unsigned VectorCatch; /* caught exception mask */
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unsigned CallDebug; /* set to call the debugger */
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unsigned CallDebug; /* set to call the debugger */
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File diff suppressed because it is too large
Load Diff
@ -18,10 +18,12 @@
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#define __ARMEMU_H__
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#define __ARMEMU_H__
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#include "core/arm/interpreter/skyeye_defs.h"
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#include "armdefs.h"
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#include "core/arm/interpreter/armdefs.h"
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//#include "skyeye.h"
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extern ARMword isize;
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//extern ARMword isize;
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#define DEBUG(...) DEBUG_LOG(ARM11, __VA_ARGS__)
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/* Condition code values. */
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/* Condition code values. */
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#define EQ 0
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#define EQ 0
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@ -228,17 +230,6 @@ extern ARMword isize;
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} \
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} \
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while (0)
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while (0)
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#define SETABORT_SKIPBRANCH(i, m, d) \
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do \
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{ \
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int SETABORT_mode = (m); \
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\
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ARMul_SetSPSR (state, SETABORT_mode, ARMul_GetCPSR (state)); \
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ARMul_SetCPSR (state, ((ARMul_GetCPSR (state) & ~(EMODE | TBIT)) \
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| (i) | SETABORT_mode)); \
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} \
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while (0)
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#ifndef MODE32
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#ifndef MODE32
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#define VECTORS 0x20
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#define VECTORS 0x20
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#define LEGALADDR 0x03ffffff
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#define LEGALADDR 0x03ffffff
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@ -306,7 +297,7 @@ extern ARMword isize;
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if (! state->is_v4) \
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if (! state->is_v4) \
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{ \
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{ \
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/* A standard PC inc and an S cycle. */ \
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/* A standard PC inc and an S cycle. */ \
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state->Reg[15] += isize; \
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state->Reg[15] += INSN_SIZE; \
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state->NextInstr = (state->NextInstr & 0xff) | 2; \
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state->NextInstr = (state->NextInstr & 0xff) | 2; \
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} \
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} \
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} \
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} \
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@ -320,7 +311,7 @@ extern ARMword isize;
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else \
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else \
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{ \
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{ \
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/* A standard PC inc and an N cycle. */ \
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/* A standard PC inc and an N cycle. */ \
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state->Reg[15] += isize; \
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state->Reg[15] += INSN_SIZE; \
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state->NextInstr |= 3; \
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state->NextInstr |= 3; \
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} \
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} \
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} \
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} \
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@ -330,7 +321,7 @@ extern ARMword isize;
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do \
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do \
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{ \
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{ \
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/* A standard PC inc. */ \
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/* A standard PC inc. */ \
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state->Reg[15] += isize; \
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state->Reg[15] += INSN_SIZE; \
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state->NextInstr |= 2; \
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state->NextInstr |= 2; \
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} \
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} \
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while (0)
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while (0)
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@ -420,9 +411,7 @@ extern ARMword isize;
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|| (read_cp15_reg (15, 0, 1) & (1 << (CP))))
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|| (read_cp15_reg (15, 0, 1) & (1 << (CP))))
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*/
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*/
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#define CP_ACCESS_ALLOWED(STATE, CP) \
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#define CP_ACCESS_ALLOWED(STATE, CP) \
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( ((CP) >= 14) \
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( ((CP) >= 14) ) \
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|| (! (STATE)->is_XScale) \
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|| (xscale_cp15_cp_access_allowed(STATE,15,CP)))
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/* Macro to rotate n right by b bits. */
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/* Macro to rotate n right by b bits. */
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#define ROTATER(n, b) (((n) >> (b)) | ((n) << (32 - (b))))
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#define ROTATER(n, b) (((n) >> (b)) | ((n) << (32 - (b))))
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@ -1,30 +1,21 @@
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/* arminit.c -- ARMulator initialization: ARM6 Instruction Emulator.
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/* arminit.c -- ARMulator initialization: ARM6 Instruction Emulator.
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Copyright (C) 1994 Advanced RISC Machines Ltd.
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Copyright (C) 1994 Advanced RISC Machines Ltd.
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This program is free software; you can redistribute it and/or modify
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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along with this program; if not, write to the Free Software
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Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
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Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
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//#include <unistd.h>
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#include "common/platform.h"
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#if EMU_PLATFORM == PLATFORM_LINUX
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#include <unistd.h>
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#elif EMU_PLATFORM == PLATFORM_WINDOWS
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#include <windows.h>
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#endif
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#include <math.h>
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#include "core/arm/interpreter/armdefs.h"
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#include "core/arm/interpreter/armdefs.h"
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#include "core/arm/interpreter/armemu.h"
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#include "core/arm/interpreter/armemu.h"
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@ -42,9 +33,9 @@ ARMword ARMul_DoProg (ARMul_State * state);
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ARMword ARMul_DoInstr (ARMul_State * state);
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ARMword ARMul_DoInstr (ARMul_State * state);
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void ARMul_Abort (ARMul_State * state, ARMword address);
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void ARMul_Abort (ARMul_State * state, ARMword address);
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unsigned ARMul_MultTable[32] =
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unsigned ARMul_MultTable[32] = {
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{ 1, 2, 2, 3, 3, 4, 4, 5, 5, 6, 6, 7, 7, 8, 8, 9, 9,
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1, 2, 2, 3, 3, 4, 4, 5, 5, 6, 6, 7, 7, 8, 8, 9, 9,
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10, 10, 11, 11, 12, 12, 13, 13, 14, 14, 15, 15, 16, 16, 16
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10, 10, 11, 11, 12, 12, 13, 13, 14, 14, 15, 15, 16, 16, 16
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};
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};
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ARMword ARMul_ImmedTable[4096]; /* immediate DP LHS values */
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ARMword ARMul_ImmedTable[4096]; /* immediate DP LHS values */
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char ARMul_BitList[256]; /* number of bits in a byte table */
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char ARMul_BitList[256]; /* number of bits in a byte table */
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@ -56,78 +47,34 @@ extern int remote_interrupt( void );
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void arm_dyncom_Abort(ARMul_State * state, ARMword vector)
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void arm_dyncom_Abort(ARMul_State * state, ARMword vector)
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{
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{
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ARMul_Abort(state, vector);
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ARMul_Abort(state, vector);
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}
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}
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/* ahe-ykl : the following code to initialize user mode
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/* ahe-ykl : the following code to initialize user mode
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code is architecture dependent and probably model dependant. */
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code is architecture dependent and probably model dependant. */
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//#include "skyeye_arch.h"
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/*#include "skyeye_arch.h"
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//#include "skyeye_pref.h"
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#include "skyeye_pref.h"
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//#include "skyeye_exec_info.h"
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#include "skyeye_exec_info.h"
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//#include "bank_defs.h"
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#include "bank_defs.h"*/
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#include "armcpu.h"
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//#include "armcpu.h"
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//#include "skyeye_callback.h"
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//#include "skyeye_callback.h"
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//void arm_user_mode_init(generic_arch_t * arch_instance)
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/*
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//{
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ARM_CPU_State* cpu = get_current_cpu();
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// sky_pref_t *pref = get_skyeye_pref();
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arm_core_t* core = &cpu->core[0];
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//
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// if (pref->user_mode_sim)
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// {
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// sky_exec_info_t *info = get_skyeye_exec_info();
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// info->arch_page_size = 0x1000;
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// info->arch_stack_top = 0x1ffffff0;// + 0x401fe7 - 0xff0; /* arbitrary value */
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// /* stack initial address specific to architecture may be placed here */
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//
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// /* we need to mmap the stack space, if we are using skyeye space */
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// if (info->mmap_access)
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// {
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// /* get system stack size */
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// size_t stacksize = 0;
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// pthread_attr_t attr;
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// pthread_attr_init(&attr);
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// pthread_attr_getstacksize(&attr, &stacksize);
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// if (stacksize > info->arch_stack_top)
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// {
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// printf("arch_stack_top is too low\n");
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// stacksize = info->arch_stack_top;
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// }
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//
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// /* Note: Skyeye is occupating 0x400000 to 0x600000 */
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// /* We do a mmap */
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// void* ret = mmap( (info->arch_stack_top) - stacksize,
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// stacksize + 0x1000 , PROT_READ | PROT_WRITE, MAP_ANONYMOUS | MAP_PRIVATE, -1, 0);
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// if (ret == MAP_FAILED){
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// /* ideally, we should find an empty space until it works */
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// printf("mmap error, stack couldn't be mapped: errno %d\n", errno);
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// exit(-1);
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// } else {
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// memset(ret, '\0', stacksize);
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// //printf("stack top has been defined at %x size %x\n", (uint32_t) ret + stacksize, stacksize);
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// //info->arch_stack_top = (uint32_t) ret + stacksize;
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// }
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// }
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//
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// exec_stack_init();
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//
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// ARM_CPU_State* cpu = get_current_cpu();
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// arm_core_t* core = &cpu->core[0];
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//
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// uint32_t sp = info->initial_sp;
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//
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// core->Cpsr = 0x10; /* User mode */
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// /* FIXME: may need to add thumb */
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// core->Reg[13] = sp;
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// core->Reg[10] = info->start_data;
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// core->Reg[0] = 0;
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// bus_read(32, sp + 4, &(core->Reg[1]));
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// bus_read(32, sp + 8, &(core->Reg[2]));
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// }
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//
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//}
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uint32_t sp = info->initial_sp;
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core->Cpsr = 0x10; // User mode
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// FIXME: may need to add thumb
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core->Reg[13] = sp;
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core->Reg[10] = info->start_data;
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core->Reg[0] = 0;
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bus_read(32, sp + 4, &(core->Reg[1]));
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bus_read(32, sp + 8, &(core->Reg[2]));
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*/
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/***************************************************************************\
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/***************************************************************************\
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* Call this routine once to set up the emulator's tables. *
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* Call this routine once to set up the emulator's tables. *
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\***************************************************************************/
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\***************************************************************************/
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@ -135,20 +82,20 @@ void arm_dyncom_Abort(ARMul_State * state, ARMword vector)
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void
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void
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ARMul_EmulateInit (void)
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ARMul_EmulateInit (void)
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{
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{
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unsigned int i, j;
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unsigned int i, j;
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for (i = 0; i < 4096; i++) { /* the values of 12 bit dp rhs's */
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for (i = 0; i < 4096; i++) { /* the values of 12 bit dp rhs's */
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ARMul_ImmedTable[i] = ROTATER (i & 0xffL, (i >> 7L) & 0x1eL);
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ARMul_ImmedTable[i] = ROTATER (i & 0xffL, (i >> 7L) & 0x1eL);
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}
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}
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for (i = 0; i < 256; ARMul_BitList[i++] = 0); /* how many bits in LSM */
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for (i = 0; i < 256; ARMul_BitList[i++] = 0); /* how many bits in LSM */
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for (j = 1; j < 256; j <<= 1)
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for (j = 1; j < 256; j <<= 1)
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for (i = 0; i < 256; i++)
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for (i = 0; i < 256; i++)
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if ((i & j) > 0)
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if ((i & j) > 0)
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ARMul_BitList[i]++;
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ARMul_BitList[i]++;
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for (i = 0; i < 256; i++)
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for (i = 0; i < 256; i++)
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ARMul_BitList[i] *= 4; /* you always need 4 times these values */
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ARMul_BitList[i] *= 4; /* you always need 4 times these values */
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}
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}
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@ -159,80 +106,82 @@ ARMul_EmulateInit (void)
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ARMul_State *
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ARMul_State *
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ARMul_NewState (ARMul_State *state)
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ARMul_NewState (ARMul_State *state)
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{
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{
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unsigned i, j;
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unsigned i, j;
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memset (state, 0, sizeof (ARMul_State));
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memset (state, 0, sizeof (ARMul_State));
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state->Emulate = RUN;
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state->Emulate = RUN;
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for (i = 0; i < 16; i++) {
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for (i = 0; i < 16; i++) {
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state->Reg[i] = 0;
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state->Reg[i] = 0;
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for (j = 0; j < 7; j++)
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for (j = 0; j < 7; j++)
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state->RegBank[j][i] = 0;
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state->RegBank[j][i] = 0;
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}
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}
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for (i = 0; i < 7; i++)
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for (i = 0; i < 7; i++)
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state->Spsr[i] = 0;
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state->Spsr[i] = 0;
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state->Mode = 0;
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state->Mode = 0;
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state->CallDebug = FALSE;
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state->CallDebug = FALSE;
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state->Debug = FALSE;
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state->Debug = FALSE;
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state->VectorCatch = 0;
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state->VectorCatch = 0;
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state->Aborted = FALSE;
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state->Aborted = FALSE;
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state->Reseted = FALSE;
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state->Reseted = FALSE;
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state->Inted = 3;
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state->Inted = 3;
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state->LastInted = 3;
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state->LastInted = 3;
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state->CommandLine = NULL;
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state->CommandLine = NULL;
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state->EventSet = 0;
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state->EventSet = 0;
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state->Now = 0;
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state->Now = 0;
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state->EventPtr =
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state->EventPtr =
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(struct EventNode **) malloc ((unsigned) EVENTLISTSIZE *
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(struct EventNode **) malloc ((unsigned) EVENTLISTSIZE *
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sizeof (struct EventNode *));
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sizeof (struct EventNode *));
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#if DIFF_STATE
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#if DIFF_STATE
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state->state_log = fopen("/data/state.log", "w");
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state->state_log = fopen("/data/state.log", "w");
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printf("create pc log file.\n");
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printf("create pc log file.\n");
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#endif
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#endif
|
||||||
if (state->EventPtr == NULL) {
|
if (state->EventPtr == NULL) {
|
||||||
printf ("SKYEYE: ARMul_NewState malloc state->EventPtr error\n");
|
printf ("SKYEYE: ARMul_NewState malloc state->EventPtr error\n");
|
||||||
exit(-1);
|
exit(-1);
|
||||||
}
|
//skyeye_exit (-1);
|
||||||
for (i = 0; i < EVENTLISTSIZE; i++)
|
}
|
||||||
*(state->EventPtr + i) = NULL;
|
for (i = 0; i < EVENTLISTSIZE; i++)
|
||||||
|
*(state->EventPtr + i) = NULL;
|
||||||
#if SAVE_LOG
|
#if SAVE_LOG
|
||||||
state->state_log = fopen("/tmp/state.log", "w");
|
state->state_log = fopen("/tmp/state.log", "w");
|
||||||
printf("create pc log file.\n");
|
printf("create pc log file.\n");
|
||||||
#else
|
#else
|
||||||
#if DIFF_LOG
|
#if DIFF_LOG
|
||||||
state->state_log = fopen("/tmp/state.log", "r");
|
state->state_log = fopen("/tmp/state.log", "r");
|
||||||
printf("loaded pc log file.\n");
|
printf("loaded pc log file.\n");
|
||||||
#endif
|
#endif
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
#ifdef ARM61
|
#ifdef ARM61
|
||||||
state->prog32Sig = LOW;
|
state->prog32Sig = LOW;
|
||||||
state->data32Sig = LOW;
|
state->data32Sig = LOW;
|
||||||
#else
|
#else
|
||||||
state->prog32Sig = HIGH;
|
state->prog32Sig = HIGH;
|
||||||
state->data32Sig = HIGH;
|
state->data32Sig = HIGH;
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
state->lateabtSig = HIGH;
|
state->lateabtSig = HIGH;
|
||||||
state->bigendSig = LOW;
|
state->bigendSig = LOW;
|
||||||
|
|
||||||
//chy:2003-08-19
|
//chy:2003-08-19
|
||||||
state->LastTime = 0;
|
state->LastTime = 0;
|
||||||
state->CP14R0_CCD = -1;
|
state->CP14R0_CCD = -1;
|
||||||
|
|
||||||
/* ahe-ykl: common function for interpret and dyncom */
|
|
||||||
//sky_pref_t *pref = get_skyeye_pref();
|
|
||||||
//if (pref->user_mode_sim)
|
|
||||||
// register_callback(arm_user_mode_init, Bootmach_callback);
|
|
||||||
|
|
||||||
memset(&state->exclusive_tag_array[0], 0xFF, sizeof(state->exclusive_tag_array[0]) * 128);
|
/* ahe-ykl: common function for interpret and dyncom */
|
||||||
state->exclusive_access_state = 0;
|
/*sky_pref_t *pref = get_skyeye_pref();
|
||||||
//state->cpu = (cpu_config_t *) malloc (sizeof (cpu_config_t));
|
if (pref->user_mode_sim)
|
||||||
//state->mem_bank = (mem_config_t *) malloc (sizeof (mem_config_t));
|
register_callback(arm_user_mode_init, Bootmach_callback);
|
||||||
return (state);
|
*/
|
||||||
|
|
||||||
|
memset(&state->exclusive_tag_array[0], 0xFF, sizeof(state->exclusive_tag_array[0]) * 128);
|
||||||
|
state->exclusive_access_state = 0;
|
||||||
|
//state->cpu = (cpu_config_t *) malloc (sizeof (cpu_config_t));
|
||||||
|
//state->mem_bank = (mem_config_t *) malloc (sizeof (mem_config_t));
|
||||||
|
return (state);
|
||||||
}
|
}
|
||||||
|
|
||||||
/***************************************************************************\
|
/***************************************************************************\
|
||||||
@ -242,39 +191,38 @@ ARMul_NewState (ARMul_State *state)
|
|||||||
void
|
void
|
||||||
ARMul_SelectProcessor (ARMul_State * state, unsigned properties)
|
ARMul_SelectProcessor (ARMul_State * state, unsigned properties)
|
||||||
{
|
{
|
||||||
if (properties & ARM_Fix26_Prop) {
|
if (properties & ARM_Fix26_Prop) {
|
||||||
state->prog32Sig = LOW;
|
state->prog32Sig = LOW;
|
||||||
state->data32Sig = LOW;
|
state->data32Sig = LOW;
|
||||||
}
|
} else {
|
||||||
else {
|
state->prog32Sig = HIGH;
|
||||||
state->prog32Sig = HIGH;
|
state->data32Sig = HIGH;
|
||||||
state->data32Sig = HIGH;
|
}
|
||||||
}
|
/* 2004-05-09 chy
|
||||||
/* 2004-05-09 chy
|
below line sould be in skyeye_mach_XXX.c 's XXX_mach_init function
|
||||||
below line sould be in skyeye_mach_XXX.c 's XXX_mach_init function
|
*/
|
||||||
*/
|
// state->lateabtSig = HIGH;
|
||||||
// state->lateabtSig = HIGH;
|
|
||||||
|
|
||||||
|
|
||||||
state->is_v4 =
|
state->is_v4 =
|
||||||
(properties & (ARM_v4_Prop | ARM_v5_Prop)) ? HIGH : LOW;
|
(properties & (ARM_v4_Prop | ARM_v5_Prop)) ? HIGH : LOW;
|
||||||
state->is_v5 = (properties & ARM_v5_Prop) ? HIGH : LOW;
|
state->is_v5 = (properties & ARM_v5_Prop) ? HIGH : LOW;
|
||||||
state->is_v5e = (properties & ARM_v5e_Prop) ? HIGH : LOW;
|
state->is_v5e = (properties & ARM_v5e_Prop) ? HIGH : LOW;
|
||||||
state->is_XScale = (properties & ARM_XScale_Prop) ? HIGH : LOW;
|
state->is_XScale = (properties & ARM_XScale_Prop) ? HIGH : LOW;
|
||||||
state->is_iWMMXt = (properties & ARM_iWMMXt_Prop) ? HIGH : LOW;
|
state->is_iWMMXt = (properties & ARM_iWMMXt_Prop) ? HIGH : LOW;
|
||||||
/* state->is_v6 = LOW */;
|
/* state->is_v6 = LOW */;
|
||||||
/* jeff.du 2010-08-05 */
|
/* jeff.du 2010-08-05 */
|
||||||
state->is_v6 = (properties & ARM_v6_Prop) ? HIGH : LOW;
|
state->is_v6 = (properties & ARM_v6_Prop) ? HIGH : LOW;
|
||||||
state->is_ep9312 = (properties & ARM_ep9312_Prop) ? HIGH : LOW;
|
state->is_ep9312 = (properties & ARM_ep9312_Prop) ? HIGH : LOW;
|
||||||
//chy 2005-09-19
|
//chy 2005-09-19
|
||||||
state->is_pxa27x = (properties & ARM_PXA27X_Prop) ? HIGH : LOW;
|
state->is_pxa27x = (properties & ARM_PXA27X_Prop) ? HIGH : LOW;
|
||||||
|
|
||||||
/* shenoubang 2012-3-11 */
|
/* shenoubang 2012-3-11 */
|
||||||
state->is_v7 = (properties & ARM_v7_Prop) ? HIGH : LOW;
|
state->is_v7 = (properties & ARM_v7_Prop) ? HIGH : LOW;
|
||||||
|
|
||||||
/* Only initialse the coprocessor support once we
|
/* Only initialse the coprocessor support once we
|
||||||
know what kind of chip we are dealing with. */
|
know what kind of chip we are dealing with. */
|
||||||
ARMul_CoProInit (state);
|
//ARMul_CoProInit (state);
|
||||||
|
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -285,66 +233,65 @@ below line sould be in skyeye_mach_XXX.c 's XXX_mach_init function
|
|||||||
void
|
void
|
||||||
ARMul_Reset (ARMul_State * state)
|
ARMul_Reset (ARMul_State * state)
|
||||||
{
|
{
|
||||||
//fprintf(stderr,"armul_reset 0: state-> Cpsr 0x%x, Mode %d\n",state->Cpsr,state->Mode);
|
//fprintf(stderr,"armul_reset 0: state-> Cpsr 0x%x, Mode %d\n",state->Cpsr,state->Mode);
|
||||||
state->NextInstr = 0;
|
state->NextInstr = 0;
|
||||||
if (state->prog32Sig) {
|
if (state->prog32Sig) {
|
||||||
state->Reg[15] = 0;
|
state->Reg[15] = 0;
|
||||||
state->Cpsr = INTBITS | SVC32MODE;
|
state->Cpsr = INTBITS | SVC32MODE;
|
||||||
state->Mode = SVC32MODE;
|
state->Mode = SVC32MODE;
|
||||||
}
|
} else {
|
||||||
else {
|
state->Reg[15] = R15INTBITS | SVC26MODE;
|
||||||
state->Reg[15] = R15INTBITS | SVC26MODE;
|
state->Cpsr = INTBITS | SVC26MODE;
|
||||||
state->Cpsr = INTBITS | SVC26MODE;
|
state->Mode = SVC26MODE;
|
||||||
state->Mode = SVC26MODE;
|
}
|
||||||
}
|
//fprintf(stderr,"armul_reset 1: state-> Cpsr 0x%x, Mode %d\n",state->Cpsr,state->Mode);
|
||||||
//fprintf(stderr,"armul_reset 1: state-> Cpsr 0x%x, Mode %d\n",state->Cpsr,state->Mode);
|
//ARMul_CPSRAltered (state);
|
||||||
ARMul_CPSRAltered (state);
|
state->Bank = SVCBANK;
|
||||||
state->Bank = SVCBANK;
|
FLUSHPIPE;
|
||||||
FLUSHPIPE;
|
|
||||||
|
|
||||||
state->EndCondition = 0;
|
state->EndCondition = 0;
|
||||||
state->ErrorCode = 0;
|
state->ErrorCode = 0;
|
||||||
|
|
||||||
//fprintf(stderr,"armul_reset 2: state-> Cpsr 0x%x, Mode %d\n",state->Cpsr,state->Mode);
|
//fprintf(stderr,"armul_reset 2: state-> Cpsr 0x%x, Mode %d\n",state->Cpsr,state->Mode);
|
||||||
state->NresetSig = HIGH;
|
state->NresetSig = HIGH;
|
||||||
state->NfiqSig = HIGH;
|
state->NfiqSig = HIGH;
|
||||||
state->NirqSig = HIGH;
|
state->NirqSig = HIGH;
|
||||||
state->NtransSig = (state->Mode & 3) ? HIGH : LOW;
|
state->NtransSig = (state->Mode & 3) ? HIGH : LOW;
|
||||||
state->abortSig = LOW;
|
state->abortSig = LOW;
|
||||||
state->AbortAddr = 1;
|
state->AbortAddr = 1;
|
||||||
|
|
||||||
state->NumInstrs = 0;
|
state->NumInstrs = 0;
|
||||||
state->NumNcycles = 0;
|
state->NumNcycles = 0;
|
||||||
state->NumScycles = 0;
|
state->NumScycles = 0;
|
||||||
state->NumIcycles = 0;
|
state->NumIcycles = 0;
|
||||||
state->NumCcycles = 0;
|
state->NumCcycles = 0;
|
||||||
state->NumFcycles = 0;
|
state->NumFcycles = 0;
|
||||||
|
|
||||||
//fprintf(stderr,"armul_reset 3: state-> Cpsr 0x%x, Mode %d\n",state->Cpsr,state->Mode);
|
//fprintf(stderr,"armul_reset 3: state-> Cpsr 0x%x, Mode %d\n",state->Cpsr,state->Mode);
|
||||||
mmu_reset (state);
|
//mmu_reset (state);
|
||||||
//fprintf(stderr,"armul_reset 4: state-> Cpsr 0x%x, Mode %d\n",state->Cpsr,state->Mode);
|
//fprintf(stderr,"armul_reset 4: state-> Cpsr 0x%x, Mode %d\n",state->Cpsr,state->Mode);
|
||||||
|
|
||||||
//mem_reset (state); /* move to memory/ram.c */
|
//mem_reset (state); /* move to memory/ram.c */
|
||||||
|
|
||||||
//fprintf(stderr,"armul_reset 5: state-> Cpsr 0x%x, Mode %d\n",state->Cpsr,state->Mode);
|
//fprintf(stderr,"armul_reset 5: state-> Cpsr 0x%x, Mode %d\n",state->Cpsr,state->Mode);
|
||||||
/*remove later. walimis 03.7.17 */
|
/*remove later. walimis 03.7.17 */
|
||||||
//io_reset(state);
|
//io_reset(state);
|
||||||
//lcd_disable(state);
|
//lcd_disable(state);
|
||||||
|
|
||||||
/*ywc 2005-04-07 move from ARMul_NewState , because skyeye_config.no_dbct will
|
/*ywc 2005-04-07 move from ARMul_NewState , because skyeye_config.no_dbct will
|
||||||
*be configured in skyeye_option_init and it is called after ARMul_NewState*/
|
*be configured in skyeye_option_init and it is called after ARMul_NewState*/
|
||||||
state->tea_break_ok = 0;
|
state->tea_break_ok = 0;
|
||||||
state->tea_break_addr = 0;
|
state->tea_break_addr = 0;
|
||||||
state->tea_pc = 0;
|
state->tea_pc = 0;
|
||||||
#ifdef DBCT
|
#ifdef DBCT
|
||||||
if (!skyeye_config.no_dbct) {
|
if (!skyeye_config.no_dbct) {
|
||||||
//teawater add for arm2x86 2005.02.14-------------------------------------------
|
//teawater add for arm2x86 2005.02.14-------------------------------------------
|
||||||
if (arm2x86_init (state)) {
|
if (arm2x86_init (state)) {
|
||||||
printf ("SKYEYE: arm2x86_init error\n");
|
printf ("SKYEYE: arm2x86_init error\n");
|
||||||
skyeye_exit (-1);
|
//skyeye_exit (-1);
|
||||||
}
|
}
|
||||||
//AJ2D--------------------------------------------------------------------------
|
//AJ2D--------------------------------------------------------------------------
|
||||||
}
|
}
|
||||||
#endif
|
#endif
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -361,8 +308,9 @@ static ARMul_State *dbct_test_speed_state = NULL;
|
|||||||
static void
|
static void
|
||||||
dbct_test_speed_sig(int signo)
|
dbct_test_speed_sig(int signo)
|
||||||
{
|
{
|
||||||
printf("\n0x%llx %llu\n", dbct_test_speed_state->instr_count, dbct_test_speed_state->instr_count);
|
printf("\n0x%llx %llu\n", dbct_test_speed_state->instr_count, dbct_test_speed_state->instr_count);
|
||||||
skyeye_exit(0);
|
exit(0);
|
||||||
|
//skyeye_exit(0);
|
||||||
}
|
}
|
||||||
#endif //DBCT_TEST_SPEED
|
#endif //DBCT_TEST_SPEED
|
||||||
//AJ2D--------------------------------------------------------------------------
|
//AJ2D--------------------------------------------------------------------------
|
||||||
@ -370,92 +318,91 @@ dbct_test_speed_sig(int signo)
|
|||||||
ARMword
|
ARMword
|
||||||
ARMul_DoProg (ARMul_State * state)
|
ARMul_DoProg (ARMul_State * state)
|
||||||
{
|
{
|
||||||
ARMword pc = 0;
|
ARMword pc = 0;
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* 2007-01-24 removed the term-io functions by Anthony Lee,
|
* 2007-01-24 removed the term-io functions by Anthony Lee,
|
||||||
* moved to "device/uart/skyeye_uart_stdio.c".
|
* moved to "device/uart/skyeye_uart_stdio.c".
|
||||||
*/
|
*/
|
||||||
|
|
||||||
//teawater add DBCT_TEST_SPEED 2005.10.04---------------------------------------
|
//teawater add DBCT_TEST_SPEED 2005.10.04---------------------------------------
|
||||||
#ifdef DBCT_TEST_SPEED
|
#ifdef DBCT_TEST_SPEED
|
||||||
{
|
{
|
||||||
if (!dbct_test_speed_state) {
|
if (!dbct_test_speed_state) {
|
||||||
//init timer
|
//init timer
|
||||||
struct itimerval value;
|
struct itimerval value;
|
||||||
struct sigaction act;
|
struct sigaction act;
|
||||||
|
|
||||||
dbct_test_speed_state = state;
|
dbct_test_speed_state = state;
|
||||||
state->instr_count = 0;
|
state->instr_count = 0;
|
||||||
act.sa_handler = dbct_test_speed_sig;
|
act.sa_handler = dbct_test_speed_sig;
|
||||||
act.sa_flags = SA_RESTART;
|
act.sa_flags = SA_RESTART;
|
||||||
//cygwin don't support ITIMER_VIRTUAL or ITIMER_PROF
|
//cygwin don't support ITIMER_VIRTUAL or ITIMER_PROF
|
||||||
#ifndef __CYGWIN__
|
#ifndef __CYGWIN__
|
||||||
if (sigaction(SIGVTALRM, &act, NULL) == -1) {
|
if (sigaction(SIGVTALRM, &act, NULL) == -1) {
|
||||||
#else
|
#else
|
||||||
if (sigaction(SIGALRM, &act, NULL) == -1) {
|
if (sigaction(SIGALRM, &act, NULL) == -1) {
|
||||||
#endif //__CYGWIN__
|
#endif //__CYGWIN__
|
||||||
fprintf(stderr, "init timer error.\n");
|
fprintf(stderr, "init timer error.\n");
|
||||||
skyeye_exit(-1);
|
exit(-1);
|
||||||
}
|
//skyeye_exit(-1);
|
||||||
if (skyeye_config.dbct_test_speed_sec) {
|
}
|
||||||
value.it_value.tv_sec = skyeye_config.dbct_test_speed_sec;
|
if (skyeye_config.dbct_test_speed_sec) {
|
||||||
}
|
value.it_value.tv_sec = skyeye_config.dbct_test_speed_sec;
|
||||||
else {
|
} else {
|
||||||
value.it_value.tv_sec = DBCT_TEST_SPEED_SEC;
|
value.it_value.tv_sec = DBCT_TEST_SPEED_SEC;
|
||||||
}
|
}
|
||||||
printf("dbct_test_speed_sec = %ld\n", value.it_value.tv_sec);
|
printf("dbct_test_speed_sec = %ld\n", value.it_value.tv_sec);
|
||||||
value.it_value.tv_usec = 0;
|
value.it_value.tv_usec = 0;
|
||||||
value.it_interval.tv_sec = 0;
|
value.it_interval.tv_sec = 0;
|
||||||
value.it_interval.tv_usec = 0;
|
value.it_interval.tv_usec = 0;
|
||||||
#ifndef __CYGWIN__
|
#ifndef __CYGWIN__
|
||||||
if (setitimer(ITIMER_VIRTUAL, &value, NULL) == -1) {
|
if (setitimer(ITIMER_VIRTUAL, &value, NULL) == -1) {
|
||||||
#else
|
#else
|
||||||
if (setitimer(ITIMER_REAL, &value, NULL) == -1) {
|
if (setitimer(ITIMER_REAL, &value, NULL) == -1) {
|
||||||
#endif //__CYGWIN__
|
#endif //__CYGWIN__
|
||||||
fprintf(stderr, "init timer error.\n");
|
fprintf(stderr, "init timer error.\n");
|
||||||
skyeye_exit(-1);
|
//skyeye_exit(-1);
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
#endif //DBCT_TEST_SPEED
|
#endif //DBCT_TEST_SPEED
|
||||||
//AJ2D--------------------------------------------------------------------------
|
//AJ2D--------------------------------------------------------------------------
|
||||||
state->Emulate = RUN;
|
state->Emulate = RUN;
|
||||||
while (state->Emulate != STOP) {
|
while (state->Emulate != STOP) {
|
||||||
state->Emulate = RUN;
|
state->Emulate = RUN;
|
||||||
|
|
||||||
/*ywc 2005-03-31 */
|
/*ywc 2005-03-31 */
|
||||||
if (state->prog32Sig && ARMul_MODE32BIT) {
|
if (state->prog32Sig && ARMul_MODE32BIT) {
|
||||||
#ifdef DBCT
|
#ifdef DBCT
|
||||||
if (skyeye_config.no_dbct) {
|
if (skyeye_config.no_dbct) {
|
||||||
pc = ARMul_Emulate32 (state);
|
pc = ARMul_Emulate32 (state);
|
||||||
}
|
} else {
|
||||||
else {
|
pc = ARMul_Emulate32_dbct (state);
|
||||||
pc = ARMul_Emulate32_dbct (state);
|
}
|
||||||
}
|
|
||||||
#else
|
#else
|
||||||
pc = ARMul_Emulate32 (state);
|
pc = ARMul_Emulate32 (state);
|
||||||
#endif
|
#endif
|
||||||
}
|
}
|
||||||
|
|
||||||
else {
|
else {
|
||||||
_dbg_assert_msg_(ARM11, false, "Unsupported ARM 26-bit Mode!");
|
//pc = ARMul_Emulate26 (state);
|
||||||
}
|
}
|
||||||
//chy 2006-02-22, should test debugmode first
|
//chy 2006-02-22, should test debugmode first
|
||||||
//chy 2006-04-14, put below codes in ARMul_Emulate
|
//chy 2006-04-14, put below codes in ARMul_Emulate
|
||||||
#if 0
|
#if 0
|
||||||
if(debugmode)
|
if(debugmode)
|
||||||
if(remote_interrupt())
|
if(remote_interrupt())
|
||||||
state->Emulate = STOP;
|
state->Emulate = STOP;
|
||||||
#endif
|
#endif
|
||||||
}
|
}
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* 2007-01-24 removed the term-io functions by Anthony Lee,
|
* 2007-01-24 removed the term-io functions by Anthony Lee,
|
||||||
* moved to "device/uart/skyeye_uart_stdio.c".
|
* moved to "device/uart/skyeye_uart_stdio.c".
|
||||||
*/
|
*/
|
||||||
|
|
||||||
return (pc);
|
return (pc);
|
||||||
}
|
}
|
||||||
|
|
||||||
/***************************************************************************\
|
/***************************************************************************\
|
||||||
@ -467,36 +414,34 @@ ARMul_DoProg (ARMul_State * state)
|
|||||||
ARMword
|
ARMword
|
||||||
ARMul_DoInstr (ARMul_State * state)
|
ARMul_DoInstr (ARMul_State * state)
|
||||||
{
|
{
|
||||||
ARMword pc = 0;
|
ARMword pc = 0;
|
||||||
|
|
||||||
state->Emulate = ONCE;
|
state->Emulate = ONCE;
|
||||||
|
|
||||||
/*ywc 2005-03-31 */
|
/*ywc 2005-03-31 */
|
||||||
if (state->prog32Sig && ARMul_MODE32BIT) {
|
if (state->prog32Sig && ARMul_MODE32BIT) {
|
||||||
#ifdef DBCT
|
#ifdef DBCT
|
||||||
if (skyeye_config.no_dbct) {
|
if (skyeye_config.no_dbct) {
|
||||||
pc = ARMul_Emulate32 (state);
|
pc = ARMul_Emulate32 (state);
|
||||||
}
|
} else {
|
||||||
else {
|
|
||||||
//teawater add compile switch for DBCT GDB RSP function 2005.10.21--------------
|
//teawater add compile switch for DBCT GDB RSP function 2005.10.21--------------
|
||||||
#ifndef DBCT_GDBRSP
|
#ifndef DBCT_GDBRSP
|
||||||
printf("DBCT GDBRSP function switch is off.\n");
|
printf("DBCT GDBRSP function switch is off.\n");
|
||||||
printf("To use this function, open \"#define DBCT_GDBRSP\" in arch/arm/common/armdefs.h & recompile skyeye.\n");
|
printf("To use this function, open \"#define DBCT_GDBRSP\" in arch/arm/common/armdefs.h & recompile skyeye.\n");
|
||||||
skyeye_exit(-1);
|
skyeye_exit(-1);
|
||||||
#endif //DBCT_GDBRSP
|
#endif //DBCT_GDBRSP
|
||||||
//AJ2D--------------------------------------------------------------------------
|
//AJ2D--------------------------------------------------------------------------
|
||||||
pc = ARMul_Emulate32_dbct (state);
|
pc = ARMul_Emulate32_dbct (state);
|
||||||
}
|
}
|
||||||
#else
|
#else
|
||||||
pc = ARMul_Emulate32 (state);
|
pc = ARMul_Emulate32 (state);
|
||||||
#endif
|
#endif
|
||||||
}
|
}
|
||||||
|
|
||||||
else {
|
//else
|
||||||
_dbg_assert_msg_(ARM11, false, "Unsupported ARM 26-bit Mode!");
|
//pc = ARMul_Emulate26 (state);
|
||||||
}
|
|
||||||
|
|
||||||
return (pc);
|
return (pc);
|
||||||
}
|
}
|
||||||
|
|
||||||
/***************************************************************************\
|
/***************************************************************************\
|
||||||
@ -508,79 +453,74 @@ ARMul_DoInstr (ARMul_State * state)
|
|||||||
void
|
void
|
||||||
ARMul_Abort (ARMul_State * state, ARMword vector)
|
ARMul_Abort (ARMul_State * state, ARMword vector)
|
||||||
{
|
{
|
||||||
ARMword temp;
|
ARMword temp;
|
||||||
int isize = INSN_SIZE;
|
int isize = INSN_SIZE;
|
||||||
int esize = (TFLAG ? 0 : 4);
|
int esize = (TFLAG ? 0 : 4);
|
||||||
int e2size = (TFLAG ? -4 : 0);
|
int e2size = (TFLAG ? -4 : 0);
|
||||||
|
|
||||||
state->Aborted = FALSE;
|
state->Aborted = FALSE;
|
||||||
|
|
||||||
if (state->prog32Sig)
|
if (state->prog32Sig)
|
||||||
if (ARMul_MODE26BIT)
|
if (ARMul_MODE26BIT)
|
||||||
temp = R15PC;
|
temp = R15PC;
|
||||||
else
|
else
|
||||||
temp = state->Reg[15];
|
temp = state->Reg[15];
|
||||||
else
|
else
|
||||||
temp = R15PC | ECC | ER15INT | EMODE;
|
temp = R15PC | ECC | ER15INT | EMODE;
|
||||||
|
|
||||||
switch (vector) {
|
switch (vector) {
|
||||||
case ARMul_ResetV: /* RESET */
|
case ARMul_ResetV: /* RESET */
|
||||||
SETABORT (INTBITS, state->prog32Sig ? SVC32MODE : SVC26MODE,
|
SETABORT (INTBITS, state->prog32Sig ? SVC32MODE : SVC26MODE,
|
||||||
0);
|
0);
|
||||||
break;
|
break;
|
||||||
case ARMul_UndefinedInstrV: /* Undefined Instruction */
|
case ARMul_UndefinedInstrV: /* Undefined Instruction */
|
||||||
SETABORT (IBIT, state->prog32Sig ? UNDEF32MODE : SVC26MODE,
|
SETABORT (IBIT, state->prog32Sig ? UNDEF32MODE : SVC26MODE,
|
||||||
isize);
|
isize);
|
||||||
break;
|
break;
|
||||||
case ARMul_SWIV: /* Software Interrupt */
|
case ARMul_SWIV: /* Software Interrupt */
|
||||||
// Modified SETABORT that doesn't branch to a SVC vector as we are implementing this in HLE
|
SETABORT (IBIT, state->prog32Sig ? SVC32MODE : SVC26MODE,
|
||||||
// Instead of doing normal routine, backup R15 by one instruction (this is what PC will get
|
isize);
|
||||||
// set to, making it the next instruction after the SVC call), and skip setting the LR.
|
break;
|
||||||
SETABORT_SKIPBRANCH (IBIT, state->prog32Sig ? SVC32MODE : SVC26MODE,
|
case ARMul_PrefetchAbortV: /* Prefetch Abort */
|
||||||
isize);
|
state->AbortAddr = 1;
|
||||||
state->Reg[15] -= 4;
|
SETABORT (IBIT, state->prog32Sig ? ABORT32MODE : SVC26MODE,
|
||||||
return;
|
esize);
|
||||||
case ARMul_PrefetchAbortV: /* Prefetch Abort */
|
break;
|
||||||
state->AbortAddr = 1;
|
case ARMul_DataAbortV: /* Data Abort */
|
||||||
SETABORT (IBIT, state->prog32Sig ? ABORT32MODE : SVC26MODE,
|
SETABORT (IBIT, state->prog32Sig ? ABORT32MODE : SVC26MODE,
|
||||||
esize);
|
e2size);
|
||||||
break;
|
break;
|
||||||
case ARMul_DataAbortV: /* Data Abort */
|
case ARMul_AddrExceptnV: /* Address Exception */
|
||||||
SETABORT (IBIT, state->prog32Sig ? ABORT32MODE : SVC26MODE,
|
SETABORT (IBIT, SVC26MODE, isize);
|
||||||
e2size);
|
break;
|
||||||
break;
|
case ARMul_IRQV: /* IRQ */
|
||||||
case ARMul_AddrExceptnV: /* Address Exception */
|
//chy 2003-09-02 the if sentence seems no use
|
||||||
SETABORT (IBIT, SVC26MODE, isize);
|
|
||||||
break;
|
|
||||||
case ARMul_IRQV: /* IRQ */
|
|
||||||
//chy 2003-09-02 the if sentence seems no use
|
|
||||||
#if 0
|
#if 0
|
||||||
if (!state->is_XScale || !state->CPRead[13] (state, 0, &temp)
|
if (!state->is_XScale || !state->CPRead[13] (state, 0, &temp)
|
||||||
|| (temp & ARMul_CP13_R0_IRQ))
|
|| (temp & ARMul_CP13_R0_IRQ))
|
||||||
#endif
|
#endif
|
||||||
SETABORT (IBIT,
|
SETABORT (IBIT,
|
||||||
state->prog32Sig ? IRQ32MODE : IRQ26MODE,
|
state->prog32Sig ? IRQ32MODE : IRQ26MODE,
|
||||||
esize);
|
esize);
|
||||||
break;
|
break;
|
||||||
case ARMul_FIQV: /* FIQ */
|
case ARMul_FIQV: /* FIQ */
|
||||||
//chy 2003-09-02 the if sentence seems no use
|
//chy 2003-09-02 the if sentence seems no use
|
||||||
#if 0
|
#if 0
|
||||||
if (!state->is_XScale || !state->CPRead[13] (state, 0, &temp)
|
if (!state->is_XScale || !state->CPRead[13] (state, 0, &temp)
|
||||||
|| (temp & ARMul_CP13_R0_FIQ))
|
|| (temp & ARMul_CP13_R0_FIQ))
|
||||||
#endif
|
#endif
|
||||||
SETABORT (INTBITS,
|
SETABORT (INTBITS,
|
||||||
state->prog32Sig ? FIQ32MODE : FIQ26MODE,
|
state->prog32Sig ? FIQ32MODE : FIQ26MODE,
|
||||||
esize);
|
esize);
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
|
|
||||||
if (ARMul_MODE32BIT) {
|
if (ARMul_MODE32BIT) {
|
||||||
if (state->mmu.control & CONTROL_VECTOR)
|
/*if (state->mmu.control & CONTROL_VECTOR)
|
||||||
vector += 0xffff0000; //for v4 high exception address
|
vector += 0xffff0000; //for v4 high exception address*/
|
||||||
if (state->vector_remap_flag)
|
if (state->vector_remap_flag)
|
||||||
vector += state->vector_remap_addr; /* support some remap function in LPC processor */
|
vector += state->vector_remap_addr; /* support some remap function in LPC processor */
|
||||||
ARMul_SetR15 (state, vector);
|
ARMul_SetR15 (state, vector);
|
||||||
}
|
} else
|
||||||
else
|
ARMul_SetR15 (state, R15CCINTMODE | vector);
|
||||||
ARMul_SetR15 (state, R15CCINTMODE | vector);
|
|
||||||
}
|
}
|
||||||
|
File diff suppressed because it is too large
Load Diff
Loading…
Reference in New Issue
Block a user