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Merge pull request #1246 from polaris-/patch-1
Fix read and write register blocks in gdbstub
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commit
78b0d9c8b0
@ -57,9 +57,8 @@ const u32 MSG_WAITALL = 8;
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const u32 R0_REGISTER = 0;
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const u32 R0_REGISTER = 0;
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const u32 R15_REGISTER = 15;
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const u32 R15_REGISTER = 15;
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const u32 CSPR_REGISTER = 25;
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const u32 CPSR_REGISTER = 25;
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const u32 FPSCR_REGISTER = 58;
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const u32 FPSCR_REGISTER = 58;
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const u32 MAX_REGISTERS = 90;
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namespace GDBStub {
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namespace GDBStub {
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@ -472,10 +471,10 @@ static void ReadRegister() {
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if (id >= R0_REGISTER && id <= R15_REGISTER) {
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if (id >= R0_REGISTER && id <= R15_REGISTER) {
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IntToGdbHex(reply, Core::g_app_core->GetReg(id));
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IntToGdbHex(reply, Core::g_app_core->GetReg(id));
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} else if (id == CSPR_REGISTER) {
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} else if (id == CPSR_REGISTER) {
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IntToGdbHex(reply, Core::g_app_core->GetCPSR());
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IntToGdbHex(reply, Core::g_app_core->GetCPSR());
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} else if (id > CSPR_REGISTER && id < FPSCR_REGISTER) {
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} else if (id > CPSR_REGISTER && id < FPSCR_REGISTER) {
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IntToGdbHex(reply, Core::g_app_core->GetVFPReg(id - CSPR_REGISTER - 1)); // VFP registers should start at 26, so one after CSPR_REGISTER
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IntToGdbHex(reply, Core::g_app_core->GetVFPReg(id - CPSR_REGISTER - 1)); // VFP registers should start at 26, so one after CSPR_REGISTER
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} else if (id == FPSCR_REGISTER) {
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} else if (id == FPSCR_REGISTER) {
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IntToGdbHex(reply, Core::g_app_core->GetVFPSystemReg(VFP_FPSCR)); // Get FPSCR
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IntToGdbHex(reply, Core::g_app_core->GetVFPSystemReg(VFP_FPSCR)); // Get FPSCR
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IntToGdbHex(reply + 8, 0);
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IntToGdbHex(reply + 8, 0);
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@ -492,21 +491,25 @@ static void ReadRegisters() {
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memset(buffer, 0, sizeof(buffer));
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memset(buffer, 0, sizeof(buffer));
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u8* bufptr = buffer;
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u8* bufptr = buffer;
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for (int i = 0, reg = 0; i <= MAX_REGISTERS; i++, reg++) {
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for (int i = 0, reg = 0; reg <= FPSCR_REGISTER; i++, reg++) {
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if (i <= R15_REGISTER) {
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if (reg <= R15_REGISTER) {
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IntToGdbHex(bufptr + i * CHAR_BIT, Core::g_app_core->GetReg(reg));
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IntToGdbHex(bufptr + i * CHAR_BIT, Core::g_app_core->GetReg(reg));
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} else if (i == CSPR_REGISTER) {
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} else if (reg == CPSR_REGISTER) {
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IntToGdbHex(bufptr + i * CHAR_BIT, Core::g_app_core->GetCPSR());
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IntToGdbHex(bufptr + i * CHAR_BIT, Core::g_app_core->GetCPSR());
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} else if (i < CSPR_REGISTER) {
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} else if (reg == CPSR_REGISTER - 1) {
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// Dummy FPA register, ignore
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IntToGdbHex(bufptr + i * CHAR_BIT, 0);
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} else if (reg < CPSR_REGISTER) {
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// Dummy FPA registers, ignore
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IntToGdbHex(bufptr + i * CHAR_BIT, 0);
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IntToGdbHex(bufptr + i * CHAR_BIT, 0);
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IntToGdbHex(bufptr + (i + 1) * CHAR_BIT, 0);
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IntToGdbHex(bufptr + (i + 1) * CHAR_BIT, 0);
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i++; // These registers seem to be all 64bit instead of 32bit, so skip two instead of one
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IntToGdbHex(bufptr + (i + 2) * CHAR_BIT, 0);
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reg++;
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i += 2;
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} else if (i > CSPR_REGISTER && i < MAX_REGISTERS) {
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} else if (reg > CPSR_REGISTER && reg < FPSCR_REGISTER) {
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IntToGdbHex(bufptr + i * CHAR_BIT, Core::g_app_core->GetVFPReg(reg - CSPR_REGISTER - 1));
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IntToGdbHex(bufptr + i * CHAR_BIT, Core::g_app_core->GetVFPReg(reg - CPSR_REGISTER - 1));
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IntToGdbHex(bufptr + (i + 1) * CHAR_BIT, 0);
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IntToGdbHex(bufptr + (i + 1) * CHAR_BIT, 0);
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i++;
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i++;
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} else if (i == MAX_REGISTERS) {
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} else if (reg == FPSCR_REGISTER) {
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IntToGdbHex(bufptr + i * CHAR_BIT, Core::g_app_core->GetVFPSystemReg(VFP_FPSCR));
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IntToGdbHex(bufptr + i * CHAR_BIT, Core::g_app_core->GetVFPSystemReg(VFP_FPSCR));
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}
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}
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}
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}
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@ -527,10 +530,10 @@ static void WriteRegister() {
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if (id >= R0_REGISTER && id <= R15_REGISTER) {
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if (id >= R0_REGISTER && id <= R15_REGISTER) {
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Core::g_app_core->SetReg(id, GdbHexToInt(buffer_ptr));
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Core::g_app_core->SetReg(id, GdbHexToInt(buffer_ptr));
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} else if (id == CSPR_REGISTER) {
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} else if (id == CPSR_REGISTER) {
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Core::g_app_core->SetCPSR(GdbHexToInt(buffer_ptr));
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Core::g_app_core->SetCPSR(GdbHexToInt(buffer_ptr));
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} else if (id > CSPR_REGISTER && id < FPSCR_REGISTER) {
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} else if (id > CPSR_REGISTER && id < FPSCR_REGISTER) {
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Core::g_app_core->SetVFPReg(id - CSPR_REGISTER - 1, GdbHexToInt(buffer_ptr));
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Core::g_app_core->SetVFPReg(id - CPSR_REGISTER - 1, GdbHexToInt(buffer_ptr));
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} else if (id == FPSCR_REGISTER) {
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} else if (id == FPSCR_REGISTER) {
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Core::g_app_core->SetVFPSystemReg(VFP_FPSCR, GdbHexToInt(buffer_ptr));
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Core::g_app_core->SetVFPSystemReg(VFP_FPSCR, GdbHexToInt(buffer_ptr));
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} else {
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} else {
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@ -547,18 +550,20 @@ static void WriteRegisters() {
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if (command_buffer[0] != 'G')
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if (command_buffer[0] != 'G')
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return SendReply("E01");
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return SendReply("E01");
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for (int i = 0, reg = 0; i <= MAX_REGISTERS; i++, reg++) {
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for (int i = 0, reg = 0; reg <= FPSCR_REGISTER; i++, reg++) {
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if (i <= R15_REGISTER) {
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if (reg <= R15_REGISTER) {
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Core::g_app_core->SetReg(reg, GdbHexToInt(buffer_ptr + i * CHAR_BIT));
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Core::g_app_core->SetReg(reg, GdbHexToInt(buffer_ptr + i * CHAR_BIT));
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} else if (i == CSPR_REGISTER) {
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} else if (reg == CPSR_REGISTER) {
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Core::g_app_core->SetCPSR(GdbHexToInt(buffer_ptr + i * CHAR_BIT));
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Core::g_app_core->SetCPSR(GdbHexToInt(buffer_ptr + i * CHAR_BIT));
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} else if (i < CSPR_REGISTER) {
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} else if (reg == CPSR_REGISTER - 1) {
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i++; // These registers seem to be all 64bit instead of 32bit, so skip two instead of one
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// Dummy FPA register, ignore
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reg++;
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} else if (reg < CPSR_REGISTER) {
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} else if (i > CSPR_REGISTER && i < MAX_REGISTERS) {
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// Dummy FPA registers, ignore
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Core::g_app_core->SetVFPReg(reg - CSPR_REGISTER - 1, GdbHexToInt(buffer_ptr + i * CHAR_BIT));
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i += 2;
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} else if (reg > CPSR_REGISTER && reg < FPSCR_REGISTER) {
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Core::g_app_core->SetVFPReg(reg - CPSR_REGISTER - 1, GdbHexToInt(buffer_ptr + i * CHAR_BIT));
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i++; // Skip padding
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i++; // Skip padding
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} else if (i == MAX_REGISTERS) {
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} else if (reg == FPSCR_REGISTER) {
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Core::g_app_core->SetVFPSystemReg(VFP_FPSCR, GdbHexToInt(buffer_ptr + i * CHAR_BIT));
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Core::g_app_core->SetVFPSystemReg(VFP_FPSCR, GdbHexToInt(buffer_ptr + i * CHAR_BIT));
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}
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}
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}
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}
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