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Merge pull request #1007 from lioncash/pc
dyncom: Handle left-operand PC correctly for data-processing ops
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commit
7c7eeb9d34
@ -3924,9 +3924,13 @@ unsigned InterpreterMainLoop(ARMul_State* cpu) {
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if (inst_base->cond == 0xE || CondPassed(cpu, inst_base->cond)) {
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if (inst_base->cond == 0xE || CondPassed(cpu, inst_base->cond)) {
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adc_inst* const inst_cream = (adc_inst*)inst_base->component;
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adc_inst* const inst_cream = (adc_inst*)inst_base->component;
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u32 rn_val = RN;
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if (inst_cream->Rn == 15)
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rn_val += 2 * cpu->GetInstructionSize();
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bool carry;
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bool carry;
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bool overflow;
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bool overflow;
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RD = AddWithCarry(RN, SHIFTER_OPERAND, cpu->CFlag, &carry, &overflow);
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RD = AddWithCarry(rn_val, SHIFTER_OPERAND, cpu->CFlag, &carry, &overflow);
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if (inst_cream->S && (inst_cream->Rd == 15)) {
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if (inst_cream->S && (inst_cream->Rd == 15)) {
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if (CurrentModeHasSPSR) {
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if (CurrentModeHasSPSR) {
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@ -3987,11 +3991,17 @@ unsigned InterpreterMainLoop(ARMul_State* cpu) {
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}
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}
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AND_INST:
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AND_INST:
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{
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{
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and_inst *inst_cream = (and_inst *)inst_base->component;
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if (inst_base->cond == 0xE || CondPassed(cpu, inst_base->cond)) {
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if ((inst_base->cond == 0xe) || CondPassed(cpu, inst_base->cond)) {
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and_inst* const inst_cream = (and_inst*)inst_base->component;
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u32 lop = RN;
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u32 lop = RN;
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u32 rop = SHIFTER_OPERAND;
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u32 rop = SHIFTER_OPERAND;
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if (inst_cream->Rn == 15)
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lop += 2 * cpu->GetInstructionSize();
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RD = lop & rop;
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RD = lop & rop;
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if (inst_cream->S && (inst_cream->Rd == 15)) {
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if (inst_cream->S && (inst_cream->Rd == 15)) {
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if (CurrentModeHasSPSR) {
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if (CurrentModeHasSPSR) {
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cpu->Cpsr = cpu->Spsr_copy;
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cpu->Cpsr = cpu->Spsr_copy;
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@ -4164,9 +4174,13 @@ unsigned InterpreterMainLoop(ARMul_State* cpu) {
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if (inst_base->cond == 0xE || CondPassed(cpu, inst_base->cond)) {
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if (inst_base->cond == 0xE || CondPassed(cpu, inst_base->cond)) {
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cmn_inst* const inst_cream = (cmn_inst*)inst_base->component;
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cmn_inst* const inst_cream = (cmn_inst*)inst_base->component;
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u32 rn_val = RN;
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if (inst_cream->Rn == 15)
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rn_val += 2 * cpu->GetInstructionSize();
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bool carry;
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bool carry;
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bool overflow;
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bool overflow;
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u32 result = AddWithCarry(RN, SHIFTER_OPERAND, 0, &carry, &overflow);
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u32 result = AddWithCarry(rn_val, SHIFTER_OPERAND, 0, &carry, &overflow);
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UPDATE_NFLAG(result);
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UPDATE_NFLAG(result);
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UPDATE_ZFLAG(result);
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UPDATE_ZFLAG(result);
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@ -4905,6 +4919,10 @@ unsigned InterpreterMainLoop(ARMul_State* cpu) {
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u32 lop = RN;
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u32 lop = RN;
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u32 rop = SHIFTER_OPERAND;
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u32 rop = SHIFTER_OPERAND;
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if (inst_cream->Rn == 15)
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lop += 2 * cpu->GetInstructionSize();
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RD = lop | rop;
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RD = lop | rop;
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if (inst_cream->S && (inst_cream->Rd == 15)) {
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if (inst_cream->S && (inst_cream->Rd == 15)) {
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@ -5195,9 +5213,13 @@ unsigned InterpreterMainLoop(ARMul_State* cpu) {
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if (inst_base->cond == 0xE || CondPassed(cpu, inst_base->cond)) {
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if (inst_base->cond == 0xE || CondPassed(cpu, inst_base->cond)) {
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rsc_inst* const inst_cream = (rsc_inst*)inst_base->component;
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rsc_inst* const inst_cream = (rsc_inst*)inst_base->component;
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u32 rn_val = RN;
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if (inst_cream->Rn == 15)
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rn_val += 2 * cpu->GetInstructionSize();
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bool carry;
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bool carry;
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bool overflow;
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bool overflow;
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RD = AddWithCarry(~RN, SHIFTER_OPERAND, cpu->CFlag, &carry, &overflow);
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RD = AddWithCarry(~rn_val, SHIFTER_OPERAND, cpu->CFlag, &carry, &overflow);
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if (inst_cream->S && (inst_cream->Rd == 15)) {
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if (inst_cream->S && (inst_cream->Rd == 15)) {
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if (CurrentModeHasSPSR) {
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if (CurrentModeHasSPSR) {
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@ -5335,9 +5357,13 @@ unsigned InterpreterMainLoop(ARMul_State* cpu) {
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if (inst_base->cond == 0xE || CondPassed(cpu, inst_base->cond)) {
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if (inst_base->cond == 0xE || CondPassed(cpu, inst_base->cond)) {
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sbc_inst* const inst_cream = (sbc_inst*)inst_base->component;
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sbc_inst* const inst_cream = (sbc_inst*)inst_base->component;
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u32 rn_val = RN;
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if (inst_cream->Rn == 15)
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rn_val += 2 * cpu->GetInstructionSize();
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bool carry;
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bool carry;
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bool overflow;
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bool overflow;
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RD = AddWithCarry(RN, ~SHIFTER_OPERAND, cpu->CFlag, &carry, &overflow);
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RD = AddWithCarry(rn_val, ~SHIFTER_OPERAND, cpu->CFlag, &carry, &overflow);
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if (inst_cream->S && (inst_cream->Rd == 15)) {
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if (inst_cream->S && (inst_cream->Rd == 15)) {
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if (CurrentModeHasSPSR) {
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if (CurrentModeHasSPSR) {
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@ -6171,7 +6197,7 @@ unsigned InterpreterMainLoop(ARMul_State* cpu) {
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u32 rn_val = RN;
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u32 rn_val = RN;
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if (inst_cream->Rn == 15)
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if (inst_cream->Rn == 15)
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rn_val += 8;
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rn_val += 2 * cpu->GetInstructionSize();
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bool carry;
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bool carry;
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bool overflow;
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bool overflow;
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