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Remove unnecessary dyncom header files
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4560178f66
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@ -115,8 +115,6 @@ set(HEADERS
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arm/skyeye_common/armdefs.h
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arm/skyeye_common/armemu.h
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arm/skyeye_common/armmmu.h
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arm/skyeye_common/armos.h
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arm/skyeye_common/skyeye_defs.h
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arm/skyeye_common/vfp/asm_vfp.h
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arm/skyeye_common/vfp/vfp.h
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arm/skyeye_common/vfp/vfp_helper.h
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@ -16,10 +16,6 @@
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#include "core/core.h"
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#include "core/core_timing.h"
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const static cpu_config_t s_arm11_cpu_info = {
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"armv6", "arm11", 0x0007b000, 0x0007f000, NONCACHE
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};
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ARM_DynCom::ARM_DynCom(PrivilegeMode initial_mode) {
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state = Common::make_unique<ARMul_State>();
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@ -27,7 +23,6 @@ ARM_DynCom::ARM_DynCom(PrivilegeMode initial_mode) {
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ARMul_SelectProcessor(state.get(), ARM_v6_Prop | ARM_v5_Prop | ARM_v5e_Prop);
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state->abort_model = ABORT_BASE_RESTORED;
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state->cpu = (cpu_config_t*)&s_arm11_cpu_info;
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state->bigendSig = LOW;
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state->lateabtSig = LOW;
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@ -6,8 +6,6 @@
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// ARM instruction, and using the existing ARM simulator.
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#include "core/arm/dyncom/arm_dyncom_thumb.h"
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#include "core/arm/skyeye_common/armos.h"
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#include "core/arm/skyeye_common/skyeye_defs.h"
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// Decode a 16bit Thumb instruction. The instruction is in the low 16-bits of the tinstr field,
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// with the following Thumb instruction held in the high 16-bits. Passing in two Thumb instructions
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@ -288,7 +286,7 @@ tdstate thumb_translate(u32 addr, u32 instr, u32* ainstr, u32* inst_size) {
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: 0xE28DDF00) // ADD
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|(tinstr & 0x007F); // off7
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} else if ((tinstr & 0x0F00) == 0x0e00)
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*ainstr = 0xEF000000 | SWI_Breakpoint;
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*ainstr = 0xEF000000 | 0x180000; // base | BKPT mask
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else {
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static const ARMword subset[4] = {
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0xE92D0000, // STMDB sp!,{rlist}
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@ -320,7 +318,7 @@ tdstate thumb_translate(u32 addr, u32 instr, u32* ainstr, u32* inst_size) {
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*ainstr |= ((tinstr & 0x00FF) << 16);
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// New breakpoint value. See gdb/arm-tdep.c
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else if ((tinstr & 0x00FF) == 0xFE)
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*ainstr |= SWI_Breakpoint;
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*ainstr |= 0x180000; // base |= BKPT mask
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else
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*ainstr |= (tinstr & 0x00FF);
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} else if ((tinstr & 0x0F00) != 0x0E00)
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@ -21,7 +21,6 @@
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#include "common/common_types.h"
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#include "core/arm/skyeye_common/arm_regformat.h"
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#include "core/arm/skyeye_common/skyeye_defs.h"
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#define BITS(s, a, b) ((s << ((sizeof(s) * 8 - 1) - b)) >> (sizeof(s) * 8 - b + a - 1))
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#define BIT(s, n) ((s >> (n)) & 1)
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@ -152,9 +151,6 @@ So, if lateabtSig=1, then it means Late Abort Model(Base Updated Abort Model)
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// 0 Base Restored Abort Model, 1 the Early Abort Model, 2 Base Updated Abort Model
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int abort_model;
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// Added by ksh in 2005-10-1
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cpu_config_t* cpu;
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// TODO(bunnei): Move this cache to a better place - it should be per codeset (likely per
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// process for our purposes), not per ARMul_State (which tracks CPU core state).
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std::unordered_map<u32, int> instruction_cache;
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@ -1,54 +0,0 @@
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/* armos.h -- ARMulator OS definitions: ARM6 Instruction Emulator.
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Copyright (C) 1994 Advanced RISC Machines Ltd.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
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*/
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//
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// SWI Numbers
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//
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#define SWI_Syscall 0x0
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#define SWI_Exit 0x1
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#define SWI_Read 0x3
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#define SWI_Write 0x4
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#define SWI_Open 0x5
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#define SWI_Close 0x6
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#define SWI_Seek 0x13
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#define SWI_Rename 0x26
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#define SWI_Break 0x11
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#define SWI_Times 0x2b
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#define SWI_Brk 0x2d
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#define SWI_Mmap 0x5a
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#define SWI_Munmap 0x5b
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#define SWI_Mmap2 0xc0
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#define SWI_GetUID32 0xc7
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#define SWI_GetGID32 0xc8
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#define SWI_GetEUID32 0xc9
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#define SWI_GetEGID32 0xca
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#define SWI_ExitGroup 0xf8
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#define SWI_Uname 0x7a
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#define SWI_Fcntl 0xdd
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#define SWI_Fstat64 0xc5
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#define SWI_Gettimeofday 0x4e
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#define SWI_Set_tls 0xf0005
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#define SWI_Breakpoint 0x180000 /* see gdb's tm-arm.h */
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@ -1,13 +0,0 @@
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#pragma once
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#include "common/common_types.h"
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struct cpu_config_t
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{
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const char* cpu_arch_name; // CPU architecture version name.e.g. ARMv4T
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const char* cpu_name; // CPU name. e.g. ARM7TDMI or ARM720T
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u32 cpu_val; // CPU value; also call MMU ID or processor id;see
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// ARM Architecture Reference Manual B2-6
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u32 cpu_mask; // cpu_val's mask.
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u32 cachetype; // CPU cache type
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};
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