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https://github.com/citra-mirror/citra.git
synced 2024-08-19 01:53:22 +02:00
commit
ae3c6e82f7
@ -162,6 +162,7 @@ static void RegisterInterruptRelayQueue(Service::Interface* self) {
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_assert_msg_(GSP, (g_interrupt_event != 0), "handle is not valid!");
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_assert_msg_(GSP, (g_interrupt_event != 0), "handle is not valid!");
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cmd_buff[1] = 0x2A07; // Value verified by 3dmoo team, purpose unknown, but needed for GSP init
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cmd_buff[2] = g_thread_id++; // Thread ID
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cmd_buff[2] = g_thread_id++; // Thread ID
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cmd_buff[4] = g_shared_memory; // GSP shared memory
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cmd_buff[4] = g_shared_memory; // GSP shared memory
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@ -172,6 +173,7 @@ static void RegisterInterruptRelayQueue(Service::Interface* self) {
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* Signals that the specified interrupt type has occurred to userland code
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* Signals that the specified interrupt type has occurred to userland code
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* @param interrupt_id ID of interrupt that is being signalled
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* @param interrupt_id ID of interrupt that is being signalled
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* @todo This should probably take a thread_id parameter and only signal this thread?
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* @todo This should probably take a thread_id parameter and only signal this thread?
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* @todo This probably does not belong in the GSP module, instead move to video_core
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*/
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*/
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void SignalInterrupt(InterruptId interrupt_id) {
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void SignalInterrupt(InterruptId interrupt_id) {
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if (0 == g_interrupt_event) {
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if (0 == g_interrupt_event) {
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@ -210,6 +212,7 @@ static void ExecuteCommand(const Command& command, u32 thread_id) {
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memcpy(Memory::GetPointer(command.dma_request.dest_address),
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memcpy(Memory::GetPointer(command.dma_request.dest_address),
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Memory::GetPointer(command.dma_request.source_address),
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Memory::GetPointer(command.dma_request.source_address),
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command.dma_request.size);
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command.dma_request.size);
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SignalInterrupt(InterruptId::DMA);
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break;
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break;
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// ctrulib homebrew sends all relevant command list data with this command,
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// ctrulib homebrew sends all relevant command list data with this command,
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@ -218,13 +221,13 @@ static void ExecuteCommand(const Command& command, u32 thread_id) {
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case CommandId::SET_COMMAND_LIST_LAST:
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case CommandId::SET_COMMAND_LIST_LAST:
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{
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{
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auto& params = command.set_command_list_last;
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auto& params = command.set_command_list_last;
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WriteGPURegister(GPU_REG_INDEX(command_processor_config.address), Memory::VirtualToPhysicalAddress(params.address) >> 3);
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WriteGPURegister(GPU_REG_INDEX(command_processor_config.address), Memory::VirtualToPhysicalAddress(params.address) >> 3);
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WriteGPURegister(GPU_REG_INDEX(command_processor_config.size), params.size >> 3);
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WriteGPURegister(GPU_REG_INDEX(command_processor_config.size), params.size);
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// TODO: Not sure if we are supposed to always write this .. seems to trigger processing though
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// TODO: Not sure if we are supposed to always write this .. seems to trigger processing though
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WriteGPURegister(GPU_REG_INDEX(command_processor_config.trigger), 1);
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WriteGPURegister(GPU_REG_INDEX(command_processor_config.trigger), 1);
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SignalInterrupt(InterruptId::P3D);
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break;
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break;
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}
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}
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@ -242,6 +245,8 @@ static void ExecuteCommand(const Command& command, u32 thread_id) {
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WriteGPURegister(GPU_REG_INDEX(memory_fill_config[1].address_end), Memory::VirtualToPhysicalAddress(params.end2) >> 3);
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WriteGPURegister(GPU_REG_INDEX(memory_fill_config[1].address_end), Memory::VirtualToPhysicalAddress(params.end2) >> 3);
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WriteGPURegister(GPU_REG_INDEX(memory_fill_config[1].size), params.end2 - params.start2);
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WriteGPURegister(GPU_REG_INDEX(memory_fill_config[1].size), params.end2 - params.start2);
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WriteGPURegister(GPU_REG_INDEX(memory_fill_config[1].value), params.value2);
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WriteGPURegister(GPU_REG_INDEX(memory_fill_config[1].value), params.value2);
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SignalInterrupt(InterruptId::PSC0);
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break;
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break;
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}
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}
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@ -255,14 +260,9 @@ static void ExecuteCommand(const Command& command, u32 thread_id) {
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WriteGPURegister(GPU_REG_INDEX(display_transfer_config.flags), params.flags);
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WriteGPURegister(GPU_REG_INDEX(display_transfer_config.flags), params.flags);
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WriteGPURegister(GPU_REG_INDEX(display_transfer_config.trigger), 1);
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WriteGPURegister(GPU_REG_INDEX(display_transfer_config.trigger), 1);
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// TODO(bunnei): Signalling all of these interrupts here is totally wrong, but it seems to
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// TODO(bunnei): Determine if these interrupts should be signalled here.
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// work well enough for running demos. Need to figure out how these all work and trigger
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// them correctly.
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SignalInterrupt(InterruptId::PSC0);
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SignalInterrupt(InterruptId::PSC1);
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SignalInterrupt(InterruptId::PSC1);
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SignalInterrupt(InterruptId::PPF);
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SignalInterrupt(InterruptId::PPF);
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SignalInterrupt(InterruptId::P3D);
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SignalInterrupt(InterruptId::DMA);
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// Update framebuffer information if requested
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// Update framebuffer information if requested
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for (int screen_id = 0; screen_id < 2; ++screen_id) {
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for (int screen_id = 0; screen_id < 2; ++screen_id) {
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@ -305,6 +305,8 @@ static void ExecuteCommand(const Command& command, u32 thread_id) {
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/// This triggers handling of the GX command written to the command buffer in shared memory.
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/// This triggers handling of the GX command written to the command buffer in shared memory.
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static void TriggerCmdReqQueue(Service::Interface* self) {
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static void TriggerCmdReqQueue(Service::Interface* self) {
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DEBUG_LOG(GSP, "called");
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// Iterate through each thread's command queue...
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// Iterate through each thread's command queue...
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for (unsigned thread_id = 0; thread_id < 0x4; ++thread_id) {
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for (unsigned thread_id = 0; thread_id < 0x4; ++thread_id) {
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CommandBuffer* command_buffer = (CommandBuffer*)GetCommandBuffer(thread_id);
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CommandBuffer* command_buffer = (CommandBuffer*)GetCommandBuffer(thread_id);
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@ -320,6 +322,9 @@ static void TriggerCmdReqQueue(Service::Interface* self) {
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command_buffer->number_commands = command_buffer->number_commands - 1;
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command_buffer->number_commands = command_buffer->number_commands - 1;
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}
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}
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}
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}
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u32* cmd_buff = Service::GetCommandBuffer();
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cmd_buff[1] = 0; // No error
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}
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}
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const Interface::FunctionInfo FunctionTable[] = {
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const Interface::FunctionInfo FunctionTable[] = {
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@ -154,8 +154,7 @@ inline void Write(u32 addr, const T data) {
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if (config.trigger & 1)
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if (config.trigger & 1)
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{
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{
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u32* buffer = (u32*)Memory::GetPointer(Memory::PhysicalToVirtualAddress(config.GetPhysicalAddress()));
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u32* buffer = (u32*)Memory::GetPointer(Memory::PhysicalToVirtualAddress(config.GetPhysicalAddress()));
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u32 size = config.size << 3;
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Pica::CommandProcessor::ProcessCommandList(buffer, config.size);
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Pica::CommandProcessor::ProcessCommandList(buffer, size);
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}
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}
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break;
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break;
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}
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}
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@ -169,7 +169,7 @@ struct Regs {
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INSERT_PADDING_WORDS(0x331);
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INSERT_PADDING_WORDS(0x331);
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struct {
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struct {
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// command list size
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// command list size (in bytes)
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u32 size;
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u32 size;
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INSERT_PADDING_WORDS(0x1);
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INSERT_PADDING_WORDS(0x1);
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@ -8,6 +8,7 @@
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#include "pica.h"
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#include "pica.h"
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#include "primitive_assembly.h"
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#include "primitive_assembly.h"
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#include "vertex_shader.h"
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#include "vertex_shader.h"
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#include "core/hle/service/gsp_gpu.h"
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#include "debug_utils/debug_utils.h"
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#include "debug_utils/debug_utils.h"
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@ -40,6 +41,11 @@ static inline void WritePicaReg(u32 id, u32 value, u32 mask) {
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DebugUtils::OnPicaRegWrite(id, registers[id]);
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DebugUtils::OnPicaRegWrite(id, registers[id]);
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switch(id) {
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switch(id) {
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// Trigger IRQ
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case PICA_REG_INDEX(trigger_irq):
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GSP_GPU::SignalInterrupt(GSP_GPU::InterruptId::P3D);
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return;
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// It seems like these trigger vertex rendering
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// It seems like these trigger vertex rendering
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case PICA_REG_INDEX(trigger_draw):
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case PICA_REG_INDEX(trigger_draw):
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case PICA_REG_INDEX(trigger_draw_indexed):
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case PICA_REG_INDEX(trigger_draw_indexed):
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@ -272,8 +278,9 @@ static std::ptrdiff_t ExecuteCommandBlock(const u32* first_command_word) {
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void ProcessCommandList(const u32* list, u32 size) {
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void ProcessCommandList(const u32* list, u32 size) {
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u32* read_pointer = (u32*)list;
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u32* read_pointer = (u32*)list;
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u32 list_length = size / sizeof(u32);
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while (read_pointer < list + size) {
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while (read_pointer < list + list_length) {
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read_pointer += ExecuteCommandBlock(read_pointer);
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read_pointer += ExecuteCommandBlock(read_pointer);
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}
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}
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}
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}
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@ -45,10 +45,16 @@ struct Regs {
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#define INSERT_PADDING_WORDS_HELPER2(x, y) INSERT_PADDING_WORDS_HELPER1(x, y)
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#define INSERT_PADDING_WORDS_HELPER2(x, y) INSERT_PADDING_WORDS_HELPER1(x, y)
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#define INSERT_PADDING_WORDS(num_words) u32 INSERT_PADDING_WORDS_HELPER2(pad, __LINE__)[(num_words)];
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#define INSERT_PADDING_WORDS(num_words) u32 INSERT_PADDING_WORDS_HELPER2(pad, __LINE__)[(num_words)];
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INSERT_PADDING_WORDS(0x41);
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INSERT_PADDING_WORDS(0x10);
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u32 trigger_irq;
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INSERT_PADDING_WORDS(0x30);
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BitField<0, 24, u32> viewport_size_x;
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BitField<0, 24, u32> viewport_size_x;
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INSERT_PADDING_WORDS(0x1);
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INSERT_PADDING_WORDS(0x1);
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BitField<0, 24, u32> viewport_size_y;
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BitField<0, 24, u32> viewport_size_y;
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INSERT_PADDING_WORDS(0x9);
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INSERT_PADDING_WORDS(0x9);
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@ -544,6 +550,7 @@ struct Regs {
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map.insert({i, #name + std::string("+") + std::to_string(i-PICA_REG_INDEX(name))}); \
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map.insert({i, #name + std::string("+") + std::to_string(i-PICA_REG_INDEX(name))}); \
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} while(false)
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} while(false)
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ADD_FIELD(trigger_irq);
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ADD_FIELD(viewport_size_x);
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ADD_FIELD(viewport_size_x);
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ADD_FIELD(viewport_size_y);
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ADD_FIELD(viewport_size_y);
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ADD_FIELD(viewport_depth_range);
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ADD_FIELD(viewport_depth_range);
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@ -607,6 +614,7 @@ private:
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#ifndef _MSC_VER
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#ifndef _MSC_VER
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#define ASSERT_REG_POSITION(field_name, position) static_assert(offsetof(Regs, field_name) == position * 4, "Field "#field_name" has invalid position")
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#define ASSERT_REG_POSITION(field_name, position) static_assert(offsetof(Regs, field_name) == position * 4, "Field "#field_name" has invalid position")
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ASSERT_REG_POSITION(trigger_irq, 0x10);
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ASSERT_REG_POSITION(viewport_size_x, 0x41);
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ASSERT_REG_POSITION(viewport_size_x, 0x41);
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ASSERT_REG_POSITION(viewport_size_y, 0x43);
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ASSERT_REG_POSITION(viewport_size_y, 0x43);
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ASSERT_REG_POSITION(viewport_depth_range, 0x4d);
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ASSERT_REG_POSITION(viewport_depth_range, 0x4d);
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