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dyncom: Switch the app and system cores into the correct mode at initialization
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c3211c9c80
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@ -7,6 +7,7 @@
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#include "core/arm/dyncom/arm_dyncom.h"
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#include "core/arm/dyncom/arm_dyncom.h"
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#include "core/arm/dyncom/arm_dyncom_interpreter.h"
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#include "core/arm/dyncom/arm_dyncom_interpreter.h"
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#include "core/arm/dyncom/arm_dyncom_run.h"
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#include "core/core.h"
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#include "core/core.h"
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#include "core/core_timing.h"
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#include "core/core_timing.h"
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@ -15,7 +16,7 @@ const static cpu_config_t s_arm11_cpu_info = {
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"armv6", "arm11", 0x0007b000, 0x0007f000, NONCACHE
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"armv6", "arm11", 0x0007b000, 0x0007f000, NONCACHE
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};
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};
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ARM_DynCom::ARM_DynCom() {
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ARM_DynCom::ARM_DynCom(PrivilegeMode initial_mode) {
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state = std::unique_ptr<ARMul_State>(new ARMul_State);
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state = std::unique_ptr<ARMul_State>(new ARMul_State);
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ARMul_NewState(state.get());
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ARMul_NewState(state.get());
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@ -33,6 +34,9 @@ ARM_DynCom::ARM_DynCom() {
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state->NextInstr = RESUME; // NOTE: This will be overwritten by LoadContext
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state->NextInstr = RESUME; // NOTE: This will be overwritten by LoadContext
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state->Emulate = RUN;
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state->Emulate = RUN;
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// Switch to the desired privilege mode.
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switch_mode(state.get(), initial_mode);
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state->Reg[13] = 0x10000000; // Set stack pointer to the top of the stack
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state->Reg[13] = 0x10000000; // Set stack pointer to the top of the stack
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state->Reg[15] = 0x00000000;
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state->Reg[15] = 0x00000000;
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}
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}
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@ -13,7 +13,7 @@
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class ARM_DynCom final : virtual public ARM_Interface {
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class ARM_DynCom final : virtual public ARM_Interface {
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public:
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public:
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ARM_DynCom();
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ARM_DynCom(PrivilegeMode initial_mode);
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~ARM_DynCom();
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~ARM_DynCom();
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void SetPC(u32 pc) override;
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void SetPC(u32 pc) override;
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@ -2,9 +2,6 @@
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// Licensed under GPLv2 or any later version
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// Licensed under GPLv2 or any later version
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// Refer to the license.txt file included.
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// Refer to the license.txt file included.
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#include <assert.h>
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#include "common/logging/log.h"
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#include "core/arm/skyeye_common/armdefs.h"
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#include "core/arm/skyeye_common/armdefs.h"
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void switch_mode(arm_core_t *core, uint32_t mode) {
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void switch_mode(arm_core_t *core, uint32_t mode) {
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@ -13,6 +10,7 @@ void switch_mode(arm_core_t *core, uint32_t mode) {
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if (mode != USERBANK) {
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if (mode != USERBANK) {
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switch (core->Mode) {
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switch (core->Mode) {
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case SYSTEM32MODE: // Shares registers with user mode
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case USER32MODE:
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case USER32MODE:
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core->Reg_usr[0] = core->Reg[13];
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core->Reg_usr[0] = core->Reg[13];
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core->Reg_usr[1] = core->Reg[14];
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core->Reg_usr[1] = core->Reg[14];
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@ -42,7 +40,6 @@ void switch_mode(arm_core_t *core, uint32_t mode) {
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core->Reg_firq[1] = core->Reg[14];
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core->Reg_firq[1] = core->Reg[14];
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core->Spsr[FIQBANK] = core->Spsr_copy;
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core->Spsr[FIQBANK] = core->Spsr_copy;
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break;
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break;
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}
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}
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switch (mode) {
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switch (mode) {
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@ -81,11 +78,15 @@ void switch_mode(arm_core_t *core, uint32_t mode) {
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core->Spsr_copy = core->Spsr[FIQBANK];
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core->Spsr_copy = core->Spsr[FIQBANK];
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core->Bank = FIQBANK;
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core->Bank = FIQBANK;
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break;
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break;
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case SYSTEM32MODE: // Shares registers with user mode.
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core->Reg[13] = core->Reg_usr[0];
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core->Reg[14] = core->Reg_usr[1];
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core->Bank = SYSTEMBANK;
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break;
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}
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}
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// Set the mode bits in the APSR
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core->Cpsr = (core->Cpsr & ~core->Mode) | mode;
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core->Mode = mode;
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core->Mode = mode;
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} else {
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LOG_CRITICAL(Core_ARM11, "user mode");
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exit(-2);
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}
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}
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}
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}
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@ -270,7 +270,7 @@ enum {
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* Mode and Bank Constants *
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* Mode and Bank Constants *
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\***************************************************************************/
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\***************************************************************************/
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enum {
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enum PrivilegeMode {
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USER32MODE = 16,
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USER32MODE = 16,
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FIQ32MODE = 17,
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FIQ32MODE = 17,
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IRQ32MODE = 18,
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IRQ32MODE = 18,
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@ -288,7 +288,7 @@ enum {
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ABORTBANK = 4,
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ABORTBANK = 4,
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UNDEFBANK = 5,
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UNDEFBANK = 5,
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DUMMYBANK = 6,
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DUMMYBANK = 6,
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SYSTEMBANK = USERBANK
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SYSTEMBANK = 7
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};
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};
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/***************************************************************************\
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/***************************************************************************\
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@ -56,11 +56,10 @@ void Stop() {
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/// Initialize the core
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/// Initialize the core
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int Init() {
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int Init() {
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LOG_DEBUG(Core, "initialized OK");
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g_sys_core = new ARM_DynCom(USER32MODE);
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g_app_core = new ARM_DynCom(USER32MODE);
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g_sys_core = new ARM_DynCom();
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g_app_core = new ARM_DynCom();
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LOG_DEBUG(Core, "Initialized OK");
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return 0;
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return 0;
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}
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}
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@ -68,7 +67,7 @@ void Shutdown() {
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delete g_app_core;
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delete g_app_core;
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delete g_sys_core;
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delete g_sys_core;
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LOG_DEBUG(Core, "shutdown OK");
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LOG_DEBUG(Core, "Shutdown OK");
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}
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}
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} // namespace
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} // namespace
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