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Merge pull request #3227 from MerryMage/cro
Allow for partial invalidation of instruction cache
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commit
d8ba07a430
2
externals/dynarmic
vendored
2
externals/dynarmic
vendored
@ -1 +1 @@
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Subproject commit f343c56268ef3f8fbed5bbc513fbc56430a47255
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Subproject commit 4110494ac4edc83f74c65834ab3ba6ddd166f42e
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@ -4,6 +4,7 @@
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#pragma once
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#include <cstddef>
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#include "common/common_types.h"
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#include "core/arm/skyeye_common/arm_regformat.h"
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#include "core/arm/skyeye_common/vfp/asm_vfp.h"
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@ -33,6 +34,13 @@ public:
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/// Clear all instruction cache
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virtual void ClearInstructionCache() = 0;
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/**
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* Invalidate the code cache at a range of addresses.
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* @param start_address The starting address of the range to invalidate.
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* @param length The length (in bytes) of the range to invalidate.
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*/
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virtual void InvalidateCacheRange(u32 start_address, size_t length) = 0;
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/// Notify CPU emulation that page tables have changed
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virtual void PageTableChanged() = 0;
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@ -187,6 +187,10 @@ void ARM_Dynarmic::ClearInstructionCache() {
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}
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}
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void ARM_Dynarmic::InvalidateCacheRange(u32 start_address, size_t length) {
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jit->InvalidateCacheRange(start_address, length);
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}
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void ARM_Dynarmic::PageTableChanged() {
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current_page_table = Memory::GetCurrentPageTable();
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@ -41,6 +41,7 @@ public:
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void PrepareReschedule() override;
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void ClearInstructionCache() override;
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void InvalidateCacheRange(u32 start_address, size_t length) override;
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void PageTableChanged() override;
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private:
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@ -34,6 +34,10 @@ void ARM_DynCom::ClearInstructionCache() {
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trans_cache_buf_top = 0;
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}
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void ARM_DynCom::InvalidateCacheRange(u32, size_t) {
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ClearInstructionCache();
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}
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void ARM_DynCom::PageTableChanged() {
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ClearInstructionCache();
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}
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@ -19,6 +19,7 @@ public:
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void Step() override;
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void ClearInstructionCache() override;
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void InvalidateCacheRange(u32 start_address, size_t length) override;
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void PageTableChanged() override;
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void SetPC(u32 pc) override;
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@ -5,6 +5,8 @@
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#include "common/alignment.h"
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#include "common/logging/log.h"
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#include "common/scope_exit.h"
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#include "core/arm/arm_interface.h"
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#include "core/core.h"
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#include "core/hle/service/ldr_ro/cro_helper.h"
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namespace Service {
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@ -61,9 +63,11 @@ ResultCode CROHelper::ApplyRelocation(VAddr target_address, RelocationType reloc
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case RelocationType::AbsoluteAddress:
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case RelocationType::AbsoluteAddress2:
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Memory::Write32(target_address, symbol_address + addend);
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Core::CPU().InvalidateCacheRange(target_address, sizeof(u32));
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break;
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case RelocationType::RelativeAddress:
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Memory::Write32(target_address, symbol_address + addend - target_future_address);
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Core::CPU().InvalidateCacheRange(target_address, sizeof(u32));
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break;
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case RelocationType::ThumbBranch:
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case RelocationType::ArmBranch:
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@ -86,6 +90,7 @@ ResultCode CROHelper::ClearRelocation(VAddr target_address, RelocationType reloc
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case RelocationType::AbsoluteAddress2:
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case RelocationType::RelativeAddress:
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Memory::Write32(target_address, 0);
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Core::CPU().InvalidateCacheRange(target_address, sizeof(u32));
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break;
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case RelocationType::ThumbBranch:
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case RelocationType::ArmBranch:
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@ -439,7 +439,7 @@ static void LoadCRO(Interface* self, bool link_on_load_bug_fix) {
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}
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}
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Core::CPU().ClearInstructionCache();
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Core::CPU().InvalidateCacheRange(cro_address, cro_size);
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LOG_INFO(Service_LDR, "CRO \"%s\" loaded at 0x%08X, fixed_end=0x%08X", cro.ModuleName().data(),
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cro_address, cro_address + fix_size);
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@ -535,7 +535,7 @@ static void UnloadCRO(Interface* self) {
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memory_synchronizer.RemoveMemoryBlock(cro_address, cro_buffer_ptr);
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}
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Core::CPU().ClearInstructionCache();
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Core::CPU().InvalidateCacheRange(cro_address, fixed_size);
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rb.Push(result);
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}
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@ -588,7 +588,6 @@ static void LinkCRO(Interface* self) {
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}
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memory_synchronizer.SynchronizeOriginalMemory();
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Core::CPU().ClearInstructionCache();
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rb.Push(result);
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}
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@ -641,7 +640,6 @@ static void UnlinkCRO(Interface* self) {
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}
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memory_synchronizer.SynchronizeOriginalMemory();
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Core::CPU().ClearInstructionCache();
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rb.Push(result);
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}
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