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emitter: Remove unused code
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@ -512,30 +512,6 @@ void XEmitter::SetJumpTarget(const FixupBranch& branch)
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}
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}
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}
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}
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// INC/DEC considered harmful on newer CPUs due to partial flag set.
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// Use ADD, SUB instead.
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/*
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void XEmitter::INC(int bits, OpArg arg)
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{
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if (arg.IsImm()) ASSERT_MSG(0, "INC - Imm argument");
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arg.operandReg = 0;
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if (bits == 16) {Write8(0x66);}
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arg.WriteRex(this, bits, bits);
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Write8(bits == 8 ? 0xFE : 0xFF);
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arg.WriteRest(this);
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}
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void XEmitter::DEC(int bits, OpArg arg)
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{
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if (arg.IsImm()) ASSERT_MSG(0, "DEC - Imm argument");
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arg.operandReg = 1;
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if (bits == 16) {Write8(0x66);}
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arg.WriteRex(this, bits, bits);
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Write8(bits == 8 ? 0xFE : 0xFF);
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arg.WriteRest(this);
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}
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*/
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//Single byte opcodes
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//Single byte opcodes
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//There is no PUSHAD/POPAD in 64-bit mode.
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//There is no PUSHAD/POPAD in 64-bit mode.
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void XEmitter::INT3() {Write8(0xCC);}
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void XEmitter::INT3() {Write8(0xCC);}
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@ -328,8 +328,6 @@ enum SSECompare
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ORD,
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ORD,
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};
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};
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typedef const u8* JumpTarget;
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class XEmitter
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class XEmitter
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{
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{
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friend struct OpArg; // for Write8 etc
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friend struct OpArg; // for Write8 etc
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@ -434,7 +432,6 @@ public:
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void CALLptr(OpArg arg);
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void CALLptr(OpArg arg);
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FixupBranch J_CC(CCFlags conditionCode, bool force5bytes = false);
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FixupBranch J_CC(CCFlags conditionCode, bool force5bytes = false);
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//void J_CC(CCFlags conditionCode, JumpTarget target);
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void J_CC(CCFlags conditionCode, const u8* addr, bool force5Bytes = false);
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void J_CC(CCFlags conditionCode, const u8* addr, bool force5Bytes = false);
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void SetJumpTarget(const FixupBranch& branch);
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void SetJumpTarget(const FixupBranch& branch);
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@ -640,23 +637,6 @@ public:
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// SSE/SSE2: Useful alternative to shuffle in some cases.
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// SSE/SSE2: Useful alternative to shuffle in some cases.
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void MOVDDUP(X64Reg regOp, const OpArg& arg);
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void MOVDDUP(X64Reg regOp, const OpArg& arg);
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// TODO: Actually implement
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#if 0
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// SSE3: Horizontal operations in SIMD registers. Could be useful for various VFPU things like dot products...
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void ADDSUBPS(X64Reg dest, const OpArg& src);
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void ADDSUBPD(X64Reg dest, const OpArg& src);
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void HADDPD(X64Reg dest, const OpArg& src);
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void HSUBPS(X64Reg dest, const OpArg& src);
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void HSUBPD(X64Reg dest, const OpArg& src);
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// SSE4: Further horizontal operations - dot products. These are weirdly flexible, the arg contains both a read mask and a write "mask".
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void DPPD(X64Reg dest, const OpArg& src, u8 arg);
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// These are probably useful for VFPU emulation.
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void INSERTPS(X64Reg dest, const OpArg& src, u8 arg);
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void EXTRACTPS(const OpArg& dest, X64Reg src, u8 arg);
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#endif
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// SSE3: Horizontal operations in SIMD registers. Very slow! shufps-based code beats it handily on Ivy.
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// SSE3: Horizontal operations in SIMD registers. Very slow! shufps-based code beats it handily on Ivy.
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void HADDPS(X64Reg dest, const OpArg& src);
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void HADDPS(X64Reg dest, const OpArg& src);
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