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armemu: Get rid of bitwise parenthesis warnings
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8ac22e7efc
commit
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@ -6084,7 +6084,7 @@ L_stm_s_takeabort:
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break;
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break;
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}
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}
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Rm = ((state->Reg[BITS(0, 3)] >> ror) & 0xFF) | ((state->Reg[BITS(0, 3)] << (32 - ror)) & 0xFF) & 0xFF;
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Rm = ((state->Reg[BITS(0, 3)] >> ror) & 0xFF) | (((state->Reg[BITS(0, 3)] << (32 - ror)) & 0xFF) & 0xFF);
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if (Rm & 0x80)
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if (Rm & 0x80)
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Rm |= 0xffffff00;
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Rm |= 0xffffff00;
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@ -6129,7 +6129,7 @@ L_stm_s_takeabort:
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if (ror == -1)
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if (ror == -1)
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break;
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break;
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Rm = ((state->Reg[BITS(0, 3)] >> ror) & 0xFFFF) | ((state->Reg[BITS(0, 3)] << (32 - ror)) & 0xFFFF) & 0xFFFF;
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Rm = ((state->Reg[BITS(0, 3)] >> ror) & 0xFFFF) | (((state->Reg[BITS(0, 3)] << (32 - ror)) & 0xFFFF) & 0xFFFF);
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if (Rm & 0x8000)
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if (Rm & 0x8000)
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Rm |= 0xffff0000;
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Rm |= 0xffff0000;
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@ -6216,7 +6216,7 @@ L_stm_s_takeabort:
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break;
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break;
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}
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}
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Rm = ((state->Reg[BITS(0, 3)] >> ror) & 0xFF) | ((state->Reg[BITS(0, 3)] << (32 - ror)) & 0xFF) & 0xFF;
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Rm = ((state->Reg[BITS(0, 3)] >> ror) & 0xFF) | (((state->Reg[BITS(0, 3)] << (32 - ror)) & 0xFF) & 0xFF);
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if (BITS(16, 19) == 0xf)
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if (BITS(16, 19) == 0xf)
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/* UXTB */
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/* UXTB */
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@ -6260,7 +6260,7 @@ L_stm_s_takeabort:
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if (ror == -1)
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if (ror == -1)
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break;
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break;
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Rm = ((state->Reg[BITS(0, 3)] >> ror) & 0xFFFF) | ((state->Reg[BITS(0, 3)] << (32 - ror)) & 0xFFFF) & 0xFFFF;
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Rm = ((state->Reg[BITS(0, 3)] >> ror) & 0xFFFF) | (((state->Reg[BITS(0, 3)] << (32 - ror)) & 0xFFFF) & 0xFFFF);
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/* UXT */
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/* UXT */
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/* state->Reg[BITS (12, 15)] = Rm; */
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/* state->Reg[BITS (12, 15)] = Rm; */
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