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PICA: Implement scissor test
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9cde5cbbd3
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@ -115,7 +115,36 @@ struct Regs {
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BitField<24, 5, Semantic> map_w;
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BitField<24, 5, Semantic> map_w;
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} vs_output_attributes[7];
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} vs_output_attributes[7];
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INSERT_PADDING_WORDS(0x11);
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INSERT_PADDING_WORDS(0xe);
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enum class ScissorMode : u32 {
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Disabled = 0,
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Exclude = 1, // Exclude pixels inside the scissor box
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Include = 3 // Exclude pixels outside the scissor box
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};
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struct {
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BitField<0, 2, ScissorMode> mode;
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union {
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BitField< 0, 16, u32> right;
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BitField<16, 16, u32> bottom;
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};
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union {
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BitField< 0, 16, u32> left_minus_1;
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BitField<16, 16, u32> top_minus_1;
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};
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u32 GetTop() const {
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return top_minus_1 + 1;
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}
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u32 GetLeft() const {
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return left_minus_1 + 1;
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}
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} scissor_test;
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union {
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union {
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BitField< 0, 10, s32> x;
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BitField< 0, 10, s32> x;
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@ -1328,6 +1357,7 @@ ASSERT_REG_POSITION(viewport_depth_range, 0x4d);
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ASSERT_REG_POSITION(viewport_depth_near_plane, 0x4e);
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ASSERT_REG_POSITION(viewport_depth_near_plane, 0x4e);
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ASSERT_REG_POSITION(vs_output_attributes[0], 0x50);
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ASSERT_REG_POSITION(vs_output_attributes[0], 0x50);
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ASSERT_REG_POSITION(vs_output_attributes[1], 0x51);
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ASSERT_REG_POSITION(vs_output_attributes[1], 0x51);
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ASSERT_REG_POSITION(scissor_test, 0x65);
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ASSERT_REG_POSITION(viewport_corner, 0x68);
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ASSERT_REG_POSITION(viewport_corner, 0x68);
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ASSERT_REG_POSITION(depthmap_enable, 0x6D);
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ASSERT_REG_POSITION(depthmap_enable, 0x6D);
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ASSERT_REG_POSITION(texture0_enable, 0x80);
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ASSERT_REG_POSITION(texture0_enable, 0x80);
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@ -338,12 +338,25 @@ static void ProcessTriangleInternal(const Shader::OutputVertex& v0,
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return;
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return;
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}
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}
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// TODO: Proper scissor rect test!
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u16 min_x = std::min({vtxpos[0].x, vtxpos[1].x, vtxpos[2].x});
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u16 min_x = std::min({vtxpos[0].x, vtxpos[1].x, vtxpos[2].x});
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u16 min_y = std::min({vtxpos[0].y, vtxpos[1].y, vtxpos[2].y});
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u16 min_y = std::min({vtxpos[0].y, vtxpos[1].y, vtxpos[2].y});
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u16 max_x = std::max({vtxpos[0].x, vtxpos[1].x, vtxpos[2].x});
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u16 max_x = std::max({vtxpos[0].x, vtxpos[1].x, vtxpos[2].x});
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u16 max_y = std::max({vtxpos[0].y, vtxpos[1].y, vtxpos[2].y});
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u16 max_y = std::max({vtxpos[0].y, vtxpos[1].y, vtxpos[2].y});
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// Convert the scissor box coordinates to 12.4 fixed point
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u16 scissor_left = (u16)(regs.scissor_test.GetLeft() << 4);
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u16 scissor_top = (u16)(regs.scissor_test.GetTop() << 4);
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u16 scissor_right = (u16)(regs.scissor_test.right << 4);
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u16 scissor_bottom = (u16)(regs.scissor_test.bottom << 4);
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if (regs.scissor_test.mode == Regs::ScissorMode::Include) {
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// Calculate the new bounds
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min_x = std::max(min_x, scissor_right);
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min_y = std::max(min_y, scissor_bottom);
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max_x = std::min(max_x, scissor_left);
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max_y = std::min(max_y, scissor_top);
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}
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min_x &= Fix12P4::IntMask();
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min_x &= Fix12P4::IntMask();
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min_y &= Fix12P4::IntMask();
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min_y &= Fix12P4::IntMask();
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max_x = ((max_x + Fix12P4::FracMask()) & Fix12P4::IntMask());
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max_x = ((max_x + Fix12P4::FracMask()) & Fix12P4::IntMask());
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@ -383,6 +396,13 @@ static void ProcessTriangleInternal(const Shader::OutputVertex& v0,
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for (u16 y = min_y + 8; y < max_y; y += 0x10) {
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for (u16 y = min_y + 8; y < max_y; y += 0x10) {
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for (u16 x = min_x + 8; x < max_x; x += 0x10) {
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for (u16 x = min_x + 8; x < max_x; x += 0x10) {
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// Do not process the pixel if it's inside the scissor box and the scissor mode is set to Exclude
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if (regs.scissor_test.mode == Regs::ScissorMode::Exclude &&
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x >= scissor_right && x <= scissor_left &&
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y >= scissor_bottom && y <= scissor_top) {
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continue;
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}
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// Calculate the barycentric coordinates w0, w1 and w2
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// Calculate the barycentric coordinates w0, w1 and w2
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int w0 = bias0 + SignedArea(vtxpos[1].xy(), vtxpos[2].xy(), {x, y});
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int w0 = bias0 + SignedArea(vtxpos[1].xy(), vtxpos[2].xy(), {x, y});
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int w1 = bias1 + SignedArea(vtxpos[2].xy(), vtxpos[0].xy(), {x, y});
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int w1 = bias1 + SignedArea(vtxpos[2].xy(), vtxpos[0].xy(), {x, y});
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@ -353,6 +353,15 @@ void RasterizerOpenGL::NotifyPicaRegisterChanged(u32 id) {
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SyncColorWriteMask();
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SyncColorWriteMask();
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break;
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break;
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// Scissor test
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case PICA_REG_INDEX(scissor_test.mode):
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shader_dirty = true;
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break;
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case PICA_REG_INDEX(scissor_test.right):
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case PICA_REG_INDEX(scissor_test.left_minus_1):
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SyncScissorTest();
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break;
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// Logic op
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// Logic op
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case PICA_REG_INDEX(output_merger.logic_op):
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case PICA_REG_INDEX(output_merger.logic_op):
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SyncLogicOp();
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SyncLogicOp();
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@ -1002,6 +1011,7 @@ void RasterizerOpenGL::SetShader() {
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SyncDepthOffset();
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SyncDepthOffset();
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SyncAlphaTest();
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SyncAlphaTest();
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SyncCombinerColor();
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SyncCombinerColor();
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SyncScissorTest();
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auto& tev_stages = Pica::g_state.regs.GetTevStages();
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auto& tev_stages = Pica::g_state.regs.GetTevStages();
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for (int index = 0; index < tev_stages.size(); ++index)
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for (int index = 0; index < tev_stages.size(); ++index)
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SyncTevConstColor(index, tev_stages[index]);
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SyncTevConstColor(index, tev_stages[index]);
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@ -1166,6 +1176,22 @@ void RasterizerOpenGL::SyncDepthTest() {
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PicaToGL::CompareFunc(regs.output_merger.depth_test_func) : GL_ALWAYS;
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PicaToGL::CompareFunc(regs.output_merger.depth_test_func) : GL_ALWAYS;
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}
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}
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void RasterizerOpenGL::SyncScissorTest() {
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const auto& regs = Pica::g_state.regs;
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if (uniform_block_data.data.scissor_right != regs.scissor_test.right ||
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uniform_block_data.data.scissor_bottom != regs.scissor_test.bottom ||
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uniform_block_data.data.scissor_left != regs.scissor_test.GetLeft() ||
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uniform_block_data.data.scissor_top != regs.scissor_test.GetTop()) {
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uniform_block_data.data.scissor_right = regs.scissor_test.right;
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uniform_block_data.data.scissor_bottom = regs.scissor_test.bottom;
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uniform_block_data.data.scissor_left = regs.scissor_test.GetLeft();
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uniform_block_data.data.scissor_top = regs.scissor_test.GetTop();
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uniform_block_data.dirty = true;
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}
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}
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void RasterizerOpenGL::SyncCombinerColor() {
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void RasterizerOpenGL::SyncCombinerColor() {
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auto combiner_color = PicaToGL::ColorRGBA8(Pica::g_state.regs.tev_combiner_buffer_color.raw);
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auto combiner_color = PicaToGL::ColorRGBA8(Pica::g_state.regs.tev_combiner_buffer_color.raw);
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if (combiner_color != uniform_block_data.data.tev_combiner_buffer_color) {
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if (combiner_color != uniform_block_data.data.tev_combiner_buffer_color) {
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@ -56,6 +56,8 @@ union PicaShaderConfig {
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const auto& regs = Pica::g_state.regs;
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const auto& regs = Pica::g_state.regs;
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state.scissor_test_mode = regs.scissor_test.mode;
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state.depthmap_enable = regs.depthmap_enable;
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state.depthmap_enable = regs.depthmap_enable;
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state.alpha_test_func = regs.output_merger.alpha_test.enable ?
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state.alpha_test_func = regs.output_merger.alpha_test.enable ?
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@ -172,6 +174,7 @@ union PicaShaderConfig {
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struct State {
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struct State {
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Pica::Regs::CompareFunc alpha_test_func;
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Pica::Regs::CompareFunc alpha_test_func;
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Pica::Regs::ScissorMode scissor_test_mode;
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Pica::Regs::TextureConfig::TextureType texture0_type;
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Pica::Regs::TextureConfig::TextureType texture0_type;
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std::array<TevStageConfigRaw, 6> tev_stages;
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std::array<TevStageConfigRaw, 6> tev_stages;
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u8 combiner_buffer_input;
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u8 combiner_buffer_input;
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@ -328,6 +331,10 @@ private:
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GLint alphatest_ref;
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GLint alphatest_ref;
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GLfloat depth_scale;
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GLfloat depth_scale;
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GLfloat depth_offset;
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GLfloat depth_offset;
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GLint scissor_right;
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GLint scissor_bottom;
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GLint scissor_left;
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GLint scissor_top;
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alignas(16) GLvec3 fog_color;
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alignas(16) GLvec3 fog_color;
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alignas(16) GLvec3 lighting_global_ambient;
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alignas(16) GLvec3 lighting_global_ambient;
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LightSrc light_src[8];
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LightSrc light_src[8];
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@ -335,7 +342,7 @@ private:
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alignas(16) GLvec4 tev_combiner_buffer_color;
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alignas(16) GLvec4 tev_combiner_buffer_color;
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};
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};
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static_assert(sizeof(UniformData) == 0x3A0, "The size of the UniformData structure has changed, update the structure in the shader");
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static_assert(sizeof(UniformData) == 0x3B0, "The size of the UniformData structure has changed, update the structure in the shader");
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static_assert(sizeof(UniformData) < 16384, "UniformData structure must be less than 16kb as per the OpenGL spec");
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static_assert(sizeof(UniformData) < 16384, "UniformData structure must be less than 16kb as per the OpenGL spec");
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/// Sets the OpenGL shader in accordance with the current PICA register state
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/// Sets the OpenGL shader in accordance with the current PICA register state
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@ -384,6 +391,9 @@ private:
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/// Syncs the depth test states to match the PICA register
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/// Syncs the depth test states to match the PICA register
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void SyncDepthTest();
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void SyncDepthTest();
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/// Syncs the scissor test state to match the PICA register
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void SyncScissorTest();
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/// Syncs the TEV combiner color buffer to match the PICA register
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/// Syncs the TEV combiner color buffer to match the PICA register
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void SyncCombinerColor();
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void SyncCombinerColor();
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@ -539,6 +539,8 @@ in float texcoord0_w;
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in vec4 normquat;
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in vec4 normquat;
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in vec3 view;
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in vec3 view;
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in vec4 gl_FragCoord;
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out vec4 color;
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out vec4 color;
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struct LightSrc {
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struct LightSrc {
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@ -555,6 +557,10 @@ layout (std140) uniform shader_data {
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int alphatest_ref;
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int alphatest_ref;
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float depth_scale;
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float depth_scale;
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float depth_offset;
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float depth_offset;
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int scissor_right;
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int scissor_bottom;
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int scissor_left;
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int scissor_top;
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vec3 fog_color;
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vec3 fog_color;
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vec3 lighting_global_ambient;
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vec3 lighting_global_ambient;
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LightSrc light_src[NUM_LIGHTS];
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LightSrc light_src[NUM_LIGHTS];
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@ -582,6 +588,16 @@ vec4 secondary_fragment_color = vec4(0.0);
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return out;
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return out;
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}
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}
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// Append the scissor test
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if (state.scissor_test_mode == Regs::ScissorMode::Include || state.scissor_test_mode == Regs::ScissorMode::Exclude) {
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out += "if (scissor_left <= scissor_right || scissor_top <= scissor_bottom) discard;\n";
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out += "if (";
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// Negate the condition if we have to keep only the pixels outside the scissor box
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if (state.scissor_test_mode == Regs::ScissorMode::Include)
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out += "!";
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out += "(gl_FragCoord.x >= scissor_right && gl_FragCoord.x <= scissor_left && gl_FragCoord.y >= scissor_bottom && gl_FragCoord.y <= scissor_top)) discard;\n";
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}
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out += "float z_over_w = 1.0 - gl_FragCoord.z * 2.0;\n";
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out += "float z_over_w = 1.0 - gl_FragCoord.z * 2.0;\n";
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out += "float depth = z_over_w * depth_scale + depth_offset;\n";
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out += "float depth = z_over_w * depth_scale + depth_offset;\n";
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if (state.depthmap_enable == Pica::Regs::DepthBuffering::WBuffering) {
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if (state.depthmap_enable == Pica::Regs::DepthBuffering::WBuffering) {
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