1997-09-18 16:21:02 +02:00
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/*-------------------------------------------------------------------------
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*
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* s_lock.h--
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* This file contains the implementation (if any) for spinlocks.
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*
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* Copyright (c) 1994, Regents of the University of California
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*
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*
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* IDENTIFICATION
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1997-09-30 18:21:42 +02:00
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* $Header: /cvsroot/pgsql/src/include/storage/s_lock.h,v 1.8 1997/09/30 16:21:42 momjian Exp $
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1997-09-18 16:21:02 +02:00
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*
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*-------------------------------------------------------------------------
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*/
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/*
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* DESCRIPTION
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* The following code fragment should be written (in assembly
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* language) on machines that have a native test-and-set instruction:
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*
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* void
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* S_LOCK(char_address)
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* char *char_address;
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* {
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* while (test_and_set(char_address))
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* ;
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* }
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*
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* If this is not done, POSTGRES will default to using System V
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* semaphores (and take a large performance hit -- around 40% of
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* its time on a DS5000/240 is spent in semop(3)...).
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*
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* NOTES
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* AIX has a test-and-set but the recommended interface is the cs(3)
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* system call. This provides an 8-instruction (plus system call
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* overhead) uninterruptible compare-and-set operation. True
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* spinlocks might be faster but using cs(3) still speeds up the
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* regression test suite by about 25%. I don't have an assembler
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* manual for POWER in any case.
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*
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*/
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#ifndef S_LOCK_H
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#define S_LOCK_H
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#include "storage/ipc.h"
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#if defined(HAS_TEST_AND_SET)
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#if defined (nextstep)
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/*
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* NEXTSTEP (mach)
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* slock_t is defined as a struct mutex.
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*/
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#define S_LOCK(lock) mutex_lock(lock)
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#define S_UNLOCK(lock) mutex_unlock(lock)
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#define S_INIT_LOCK(lock) mutex_init(lock)
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/* S_LOCK_FREE should return 1 if lock is free; 0 if lock is locked */
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/* For Mach, we have to delve inside the entrails of `struct mutex'. Ick! */
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#define S_LOCK_FREE(alock) ((alock)->lock == 0)
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#endif /* next */
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#if defined(irix5)
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/*
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* SGI IRIX 5
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* slock_t is defined as a struct abilock_t, which has a single unsigned long
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* member.
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*
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* This stuff may be supplemented in the future with Masato Kataoka's MIPS-II
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* assembly from his NECEWS SVR4 port, but we probably ought to retain this
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* for the R3000 chips out there.
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*/
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#define S_LOCK(lock) do \
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{ \
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while (!acquire_lock(lock)) \
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; \
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} while (0)
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#define S_UNLOCK(lock) release_lock(lock)
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#define S_INIT_LOCK(lock) init_lock(lock)
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/* S_LOCK_FREE should return 1 if lock is free; 0 if lock is locked */
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#define S_LOCK_FREE(lock) (stat_lock(lock) == UNLOCKED)
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#endif /* irix5 */
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/*
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* OSF/1 (Alpha AXP)
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*
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* Note that slock_t on the Alpha AXP is msemaphore instead of char
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* (see storage/ipc.h).
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*/
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#if defined(__alpha__) || defined(__alpha)
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#define S_LOCK(lock) do \
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{ \
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while (msem_lock((lock), MSEM_IF_NOWAIT) < 0) \
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; \
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} while (0)
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#define S_UNLOCK(lock) msem_unlock((lock), 0)
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#define S_INIT_LOCK(lock) msem_init((lock), MSEM_UNLOCKED)
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#define S_LOCK_FREE(lock) (!(lock)->msem_state)
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#endif /* alpha */
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/*
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* Solaris 2
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*/
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#if defined(i386_solaris) || \
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defined(sparc_solaris)
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/* for xxxxx_solaris, this is defined in port/.../tas.s */
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static int tas(slock_t *lock);
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#define S_LOCK(lock) do \
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{ \
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while (tas(lock)) \
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; \
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} while (0)
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#define S_UNLOCK(lock) (*(lock) = 0)
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#define S_INIT_LOCK(lock) S_UNLOCK(lock)
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#endif /* i86pc_solaris || sparc_solaris */
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/*
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* AIX (POWER)
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*
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* Note that slock_t on POWER/POWER2/PowerPC is int instead of char
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* (see storage/ipc.h).
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*/
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#if defined(aix)
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#define S_LOCK(lock) do \
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{ \
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1997-09-22 20:14:25 +02:00
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while (cs((int *) (lock), 0, 1)) \
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1997-09-18 16:21:02 +02:00
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; \
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} while (0)
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#define S_UNLOCK(lock) (*(lock) = 0)
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#define S_INIT_LOCK(lock) S_UNLOCK(lock)
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#endif /* aix */
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/*
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* HP-UX (PA-RISC)
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*
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* Note that slock_t on PA-RISC is a structure instead of char
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* (see storage/ipc.h).
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*/
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#if defined(hpux)
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/*
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* a "set" slock_t has a single word cleared. a "clear" slock_t has
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* all words set to non-zero.
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*/
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static slock_t clear_lock = {-1, -1, -1, -1};
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static int tas(slock_t *lock);
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#define S_LOCK(lock) do \
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{ \
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while (tas(lock)) \
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; \
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} while (0)
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#define S_UNLOCK(lock) (*(lock) = clear_lock) /* struct assignment */
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#define S_INIT_LOCK(lock) S_UNLOCK(lock)
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#define S_LOCK_FREE(lock) ( *(int *) (((long) (lock) + 15) & ~15) != 0)
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#endif /* hpux */
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/*
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* sun3
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*/
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#if defined(sun3)
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static int tas(slock_t *lock);
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#define S_LOCK(lock) do \
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{ \
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while (tas(lock)) \
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; \
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} while (0)
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#define S_UNLOCK(lock) (*(lock) = 0)
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#define S_INIT_LOCK(lock) S_UNLOCK(lock)
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static int
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tas_dummy()
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{
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asm("LLA0:");
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asm(" .data");
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asm(" .text");
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asm("|#PROC# 04");
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asm(" .globl _tas");
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asm("_tas:");
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asm("|#PROLOGUE# 1");
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asm(" movel sp@(0x4),a0");
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asm(" tas a0@");
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asm(" beq LLA1");
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asm(" moveq #-128,d0");
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asm(" rts");
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asm("LLA1:");
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asm(" moveq #0,d0");
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asm(" rts");
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asm(" .data");
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}
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#endif /* sun3 */
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/*
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* sparc machines
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*/
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#if defined(NEED_SPARC_TAS_ASM)
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/* if we're using -ansi w/ gcc, use __asm__ instead of asm */
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#if defined(__STRICT_ANSI__)
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#define asm(x) __asm__(x)
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#endif
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static int tas(slock_t *lock);
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static int
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tas_dummy()
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{
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asm(".seg \"data\"");
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asm(".seg \"text\"");
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asm(".global _tas");
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asm("_tas:");
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/*
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* Sparc atomic test and set (sparc calls it "atomic load-store")
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*/
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asm("ldstub [%r8], %r8");
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/*
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* Did test and set actually do the set?
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*/
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asm("tst %r8");
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asm("be,a ReturnZero");
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/*
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* otherwise, just return.
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*/
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asm("clr %r8");
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asm("mov 0x1, %r8");
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asm("ReturnZero:");
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asm("retl");
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asm("nop");
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}
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#define S_LOCK(addr) do \
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{ \
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while (tas(addr)) \
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; \
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} while (0)
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/*
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* addr should be as in the above S_LOCK routine
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*/
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#define S_UNLOCK(addr) (*(addr) = 0)
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#define S_INIT_LOCK(addr) (*(addr) = 0)
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#endif /* NEED_SPARC_TAS_ASM */
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/*
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* i386 based things
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*/
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#if defined(NEED_I386_TAS_ASM)
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#define S_LOCK(lock) do \
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{ \
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1997-09-22 17:49:14 +02:00
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slock_t _res; \
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1997-09-18 16:21:02 +02:00
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do \
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{ \
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1997-09-22 17:49:14 +02:00
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__asm__("xchgb %0,%1": "=q"(_res), "=m"(*lock):"0"(0x1)); \
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} while (_res != 0); \
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1997-09-18 16:21:02 +02:00
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} while (0)
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#define S_UNLOCK(lock) (*(lock) = 0)
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#define S_INIT_LOCK(lock) S_UNLOCK(lock)
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#endif /* NEED_I386_TAS_ASM */
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#if defined(__alpha__) && defined(linux)
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#define S_LOCK(lock) do \
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{ \
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1997-09-22 17:49:14 +02:00
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slock_t _res; \
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1997-09-18 16:21:02 +02:00
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do \
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{ \
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__asm__(" ldq $0, %0 \n\
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bne $0, already_set \n\
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ldq_l $0, %0 \n\
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bne $0, already_set \n\
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or $31, 1, $0 \n\
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stq_c $0, %0 \n\
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beq $0, stqc_fail \n\
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success: bis $31, $31, %1 \n\
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mb \n\
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jmp $31, end \n\
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stqc_fail: or $31, 1, $0 \n\
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already_set: bis $0, $0, %1 \n\
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1997-09-22 17:49:14 +02:00
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end: nop ": "=m"(*lock), "=r"(_res): :"0"); \
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} while (_res != 0); \
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1997-09-18 16:21:02 +02:00
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} while (0)
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#define S_UNLOCK(lock) (__asm__("mb"), *(lock) = 0)
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#define S_INIT_LOCK(lock) S_UNLOCK(lock)
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#endif /* defined(__alpha__) && defined(linux) */
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1997-09-30 18:21:42 +02:00
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#if (defined(linux) || defined(__NetBSD__)) && defined(sparc)
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1997-09-18 16:21:02 +02:00
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#define S_LOCK(lock) do \
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{ \
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1997-09-22 17:49:14 +02:00
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slock_t _res; \
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1997-09-18 16:21:02 +02:00
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do \
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{ \
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__asm__("ldstub [%1], %0" \
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1997-09-22 17:49:14 +02:00
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: "=&r"(_res) \
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1997-09-18 16:21:02 +02:00
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: "r"(lock)); \
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1997-09-22 17:49:14 +02:00
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} while (!_res != 0); \
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1997-09-18 16:21:02 +02:00
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} while (0)
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#define S_UNLOCK(lock) (*(lock) = 0)
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#define S_INIT_LOCK(lock) S_UNLOCK(lock)
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#endif /* defined(linux) && defined(sparc) */
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#if defined(linux) && defined(PPC)
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static int
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tas_dummy()
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{
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__asm__(" \n\
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tas: \n\
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lwarx 5,0,3 \n\
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cmpwi 5,0 \n\
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bne fail \n\
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addi 5,5,1 \n\
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stwcx. 5,0,3 \n\
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beq success \n\
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fail: li 3,1 \n\
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blr \n\
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success: \n\
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li 3,0 \n\
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blr \n\
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");
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}
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|
1997-09-22 20:14:25 +02:00
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|
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#define S_LOCK(lock) do \
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1997-09-18 16:21:02 +02:00
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{ \
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while (tas(lock)) \
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; \
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} while (0)
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#define S_UNLOCK(lock) (*(lock) = 0)
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#define S_INIT_LOCK(lock) S_UNLOCK(lock)
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1997-09-25 01:37:26 +02:00
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#endif /* defined(linux) && defined(PPC) */
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1997-09-25 03:48:58 +02:00
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#ifndef S_LOCK_FREE /* for those who have not already defined it */
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#define S_LOCK_FREE(lock) ((*lock) == 0)
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#endif
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1997-09-18 16:21:02 +02:00
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#endif /* HAS_TEST_AND_SET */
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#endif /* S_LOCK_H */
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