2015-04-14 16:03:42 +02:00
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/*-------------------------------------------------------------------------
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*
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* pg_crc32c.h
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* Routines for computing CRC-32C checksums.
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*
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Use Intel SSE 4.2 CRC instructions where available.
Modern x86 and x86-64 processors with SSE 4.2 support have special
instructions, crc32b and crc32q, for calculating CRC-32C. They greatly
speed up CRC calculation.
Whether the instructions can be used or not depends on the compiler and the
target architecture. If generation of SSE 4.2 instructions is allowed for
the target (-msse4.2 flag on gcc and clang), use them. If they are not
allowed by default, but the compiler supports the -msse4.2 flag to enable
them, compile just the CRC-32C function with -msse4.2 flag, and check at
runtime whether the processor we're running on supports it. If it doesn't,
fall back to the slicing-by-8 algorithm. (With the common defaults on
current operating systems, the runtime-check variant is what you get in
practice.)
Abhijit Menon-Sen, heavily modified by me, reviewed by Andres Freund.
2015-04-14 16:05:03 +02:00
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* The speed of CRC-32C calculation has a big impact on performance, so we
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* jump through some hoops to get the best implementation for each
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* platform. Some CPU architectures have special instructions for speeding
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* up CRC calculations (e.g. Intel SSE 4.2), on other platforms we use the
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* Slicing-by-8 algorithm which uses lookup tables.
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*
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* The public interface consists of four macros:
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*
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* INIT_CRC32C(crc)
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* Initialize a CRC accumulator
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*
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* COMP_CRC32C(crc, data, len)
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* Accumulate some (more) bytes into a CRC
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*
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* FIN_CRC32C(crc)
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* Finish a CRC calculation
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*
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* EQ_CRC32C(c1, c2)
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* Check for equality of two CRCs.
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2015-04-14 16:03:42 +02:00
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*
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2018-01-03 05:30:12 +01:00
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* Portions Copyright (c) 1996-2018, PostgreSQL Global Development Group
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2015-04-14 16:03:42 +02:00
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* Portions Copyright (c) 1994, Regents of the University of California
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*
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* src/include/port/pg_crc32c.h
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*
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*-------------------------------------------------------------------------
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*/
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#ifndef PG_CRC32C_H
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#define PG_CRC32C_H
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2015-10-08 19:01:36 +02:00
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#include "port/pg_bswap.h"
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2015-04-14 16:03:42 +02:00
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typedef uint32 pg_crc32c;
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Use Intel SSE 4.2 CRC instructions where available.
Modern x86 and x86-64 processors with SSE 4.2 support have special
instructions, crc32b and crc32q, for calculating CRC-32C. They greatly
speed up CRC calculation.
Whether the instructions can be used or not depends on the compiler and the
target architecture. If generation of SSE 4.2 instructions is allowed for
the target (-msse4.2 flag on gcc and clang), use them. If they are not
allowed by default, but the compiler supports the -msse4.2 flag to enable
them, compile just the CRC-32C function with -msse4.2 flag, and check at
runtime whether the processor we're running on supports it. If it doesn't,
fall back to the slicing-by-8 algorithm. (With the common defaults on
current operating systems, the runtime-check variant is what you get in
practice.)
Abhijit Menon-Sen, heavily modified by me, reviewed by Andres Freund.
2015-04-14 16:05:03 +02:00
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/* The INIT and EQ macros are the same for all implementations. */
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2015-04-14 16:03:42 +02:00
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#define INIT_CRC32C(crc) ((crc) = 0xFFFFFFFF)
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#define EQ_CRC32C(c1, c2) ((c1) == (c2))
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Use Intel SSE 4.2 CRC instructions where available.
Modern x86 and x86-64 processors with SSE 4.2 support have special
instructions, crc32b and crc32q, for calculating CRC-32C. They greatly
speed up CRC calculation.
Whether the instructions can be used or not depends on the compiler and the
target architecture. If generation of SSE 4.2 instructions is allowed for
the target (-msse4.2 flag on gcc and clang), use them. If they are not
allowed by default, but the compiler supports the -msse4.2 flag to enable
them, compile just the CRC-32C function with -msse4.2 flag, and check at
runtime whether the processor we're running on supports it. If it doesn't,
fall back to the slicing-by-8 algorithm. (With the common defaults on
current operating systems, the runtime-check variant is what you get in
practice.)
Abhijit Menon-Sen, heavily modified by me, reviewed by Andres Freund.
2015-04-14 16:05:03 +02:00
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#if defined(USE_SSE42_CRC32C)
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/* Use SSE4.2 instructions. */
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#define COMP_CRC32C(crc, data, len) \
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((crc) = pg_comp_crc32c_sse42((crc), (data), (len)))
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#define FIN_CRC32C(crc) ((crc) ^= 0xFFFFFFFF)
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extern pg_crc32c pg_comp_crc32c_sse42(pg_crc32c crc, const void *data, size_t len);
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#elif defined(USE_SSE42_CRC32C_WITH_RUNTIME_CHECK)
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/*
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* Use SSE4.2 instructions, but perform a runtime check first to check that
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* they are available.
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*/
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#define COMP_CRC32C(crc, data, len) \
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((crc) = pg_comp_crc32c((crc), (data), (len)))
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#define FIN_CRC32C(crc) ((crc) ^= 0xFFFFFFFF)
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extern pg_crc32c pg_comp_crc32c_sse42(pg_crc32c crc, const void *data, size_t len);
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extern pg_crc32c pg_comp_crc32c_sb8(pg_crc32c crc, const void *data, size_t len);
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extern pg_crc32c (*pg_comp_crc32c) (pg_crc32c crc, const void *data, size_t len);
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#else
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2015-04-14 16:03:42 +02:00
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/*
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* Use slicing-by-8 algorithm.
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*
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* On big-endian systems, the intermediate value is kept in reverse byte
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* order, to avoid byte-swapping during the calculation. FIN_CRC32C reverses
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* the bytes to the final order.
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*/
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#define COMP_CRC32C(crc, data, len) \
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((crc) = pg_comp_crc32c_sb8((crc), (data), (len)))
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#ifdef WORDS_BIGENDIAN
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2017-09-30 00:52:55 +02:00
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#define FIN_CRC32C(crc) ((crc) = pg_bswap32(crc) ^ 0xFFFFFFFF)
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2015-04-14 16:03:42 +02:00
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#else
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#define FIN_CRC32C(crc) ((crc) ^= 0xFFFFFFFF)
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#endif
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extern pg_crc32c pg_comp_crc32c_sb8(pg_crc32c crc, const void *data, size_t len);
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Use Intel SSE 4.2 CRC instructions where available.
Modern x86 and x86-64 processors with SSE 4.2 support have special
instructions, crc32b and crc32q, for calculating CRC-32C. They greatly
speed up CRC calculation.
Whether the instructions can be used or not depends on the compiler and the
target architecture. If generation of SSE 4.2 instructions is allowed for
the target (-msse4.2 flag on gcc and clang), use them. If they are not
allowed by default, but the compiler supports the -msse4.2 flag to enable
them, compile just the CRC-32C function with -msse4.2 flag, and check at
runtime whether the processor we're running on supports it. If it doesn't,
fall back to the slicing-by-8 algorithm. (With the common defaults on
current operating systems, the runtime-check variant is what you get in
practice.)
Abhijit Menon-Sen, heavily modified by me, reviewed by Andres Freund.
2015-04-14 16:05:03 +02:00
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#endif
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Phase 2 of pgindent updates.
Change pg_bsd_indent to follow upstream rules for placement of comments
to the right of code, and remove pgindent hack that caused comments
following #endif to not obey the general rule.
Commit e3860ffa4dd0dad0dd9eea4be9cc1412373a8c89 wasn't actually using
the published version of pg_bsd_indent, but a hacked-up version that
tried to minimize the amount of movement of comments to the right of
code. The situation of interest is where such a comment has to be
moved to the right of its default placement at column 33 because there's
code there. BSD indent has always moved right in units of tab stops
in such cases --- but in the previous incarnation, indent was working
in 8-space tab stops, while now it knows we use 4-space tabs. So the
net result is that in about half the cases, such comments are placed
one tab stop left of before. This is better all around: it leaves
more room on the line for comment text, and it means that in such
cases the comment uniformly starts at the next 4-space tab stop after
the code, rather than sometimes one and sometimes two tabs after.
Also, ensure that comments following #endif are indented the same
as comments following other preprocessor commands such as #else.
That inconsistency turns out to have been self-inflicted damage
from a poorly-thought-through post-indent "fixup" in pgindent.
This patch is much less interesting than the first round of indent
changes, but also bulkier, so I thought it best to separate the effects.
Discussion: https://postgr.es/m/E1dAmxK-0006EE-1r@gemulon.postgresql.org
Discussion: https://postgr.es/m/30527.1495162840@sss.pgh.pa.us
2017-06-21 21:18:54 +02:00
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#endif /* PG_CRC32C_H */
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