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Remove uses of register due to incompatibility with C++17 and up 

The use in regexec.c could remain, since we only try to keep headers C++
clean. But there really doesn't seem to be a good reason to use register in
that spot.

Discussion: https://postgr.es/m/20220308185902.ibdqmasoaunzjrfc@alap3.anarazel.de
This commit is contained in:
Andres Freund 2022-09-24 12:01:06 -07:00
parent eef63941c1
commit 03bf971d2d
4 changed files with 10 additions and 12 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
.cirrus.yml
View File

@ -556,8 +556,6 @@ task:
# - Use -fmax-errors, as particularly cpluspluscheck can be very verbose
# - XXX have to disable ICU to avoid errors:
# https://postgr.es/m/20220323002024.f2g6tivduzrktgfa%40alap3.anarazel.de
# - XXX: the -Wno-register avoids verbose warnings:
# https://postgr.es/m/20220308181837.aun3tdtdvao4vb7o%40alap3.anarazel.de
###
always:
headers_headerscheck_script: |
@ -569,7 +567,7 @@ task:
make -s -j${BUILD_JOBS} clean
time make -s headerscheck EXTRAFLAGS='-fmax-errors=10'
headers_cpluspluscheck_script: |
time make -s cpluspluscheck EXTRAFLAGS='-Wno-register -fmax-errors=10'
time make -s cpluspluscheck EXTRAFLAGS='-fmax-errors=10'
always:
upload_caches: ccache

2
src/backend/regex/regexec.c
View File

@ -192,7 +192,7 @@ pg_regexec(regex_t *re,
int flags)
{
struct vars var;
register struct vars *v = &var;
struct vars *v = &var;
int st;
size_t n;
size_t i;

2
src/include/port/atomics/arch-x86.h
View File

@ -140,7 +140,7 @@ pg_spin_delay_impl(void)
static inline bool
pg_atomic_test_set_flag_impl(volatile pg_atomic_flag *ptr)
{
register char _res = 1;
char _res = 1;
__asm__ __volatile__(
" lock \n"

14
src/include/storage/s_lock.h
View File

@ -142,7 +142,7 @@ typedef unsigned char slock_t;
static __inline__ int
tas(volatile slock_t *lock)
{
register slock_t _res = 1;
slock_t _res = 1;
/*
* Use a non-locking test before asserting the bus lock. Note that the
@ -223,7 +223,7 @@ typedef unsigned char slock_t;
static __inline__ int
tas(volatile slock_t *lock)
{
register slock_t _res = 1;
slock_t _res = 1;
__asm__ __volatile__(
" lock \n"
@ -356,7 +356,7 @@ typedef unsigned char slock_t;
static __inline__ int
tas(volatile slock_t *lock)
{
register slock_t _res;
slock_t _res;
/*
* See comment in src/backend/port/tas/sunstudio_sparc.s for why this
@ -511,9 +511,9 @@ typedef unsigned int slock_t;
static __inline__ int
tas(volatile slock_t *lock)
{
register volatile slock_t *_l = lock;
register int _res;
register int _tmp;
volatile slock_t *_l = lock;
int _res;
int _tmp;
__asm__ __volatile__(
" .set push \n"
@ -574,7 +574,7 @@ static __inline__ int
tas(volatile slock_t *lock)
{
volatile int *lockword = TAS_ACTIVE_WORD(lock);
register int lockval;
int lockval;
/*
* The LDCWX instruction atomically clears the target word and