Since HPUX now exists for Itanium, we should decouple the assumption
that OS=hpux is the same as CPU=hppa. First steps at doing this. With these patches, we still work on hppa with either gcc or HP's cc. We might work on hpux/itanium with gcc, but I can't test it. Definitely will not work on hpux/itanium with non-gcc compiler, for lack of spinlock code.
This commit is contained in:
Tom Lane
parent
75619cff56
commit
13ac54d1ca
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@ -1453,7 +1453,7 @@ PORTNAME=$template
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# assembler code in src/include/storage/s_lock.h, so we just use
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# a dummy file here.
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case $host in
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*-*-hpux*) need_tas=yes; tas_file=hpux.s ;;
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hppa*-*-hpux*) need_tas=yes; tas_file=hpux_hppa.s ;;
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sparc-*-solaris*) need_tas=yes; tas_file=solaris_sparc.s ;;
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i?86-*-solaris*) need_tas=yes; tas_file=solaris_i386.s ;;
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*) need_tas=no; tas_file=dummy.s ;;
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@ -1,5 +1,5 @@
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dnl Process this file with autoconf to produce a configure script.
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dnl $Header: /cvsroot/pgsql/configure.in,v 1.271 2003/08/01 03:10:03 momjian Exp $
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dnl $Header: /cvsroot/pgsql/configure.in,v 1.272 2003/08/01 19:12:52 tgl Exp $
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dnl
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dnl Developers, please strive to achieve this order:
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dnl
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@ -108,7 +108,7 @@ AC_SUBST(PORTNAME)
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# assembler code in src/include/storage/s_lock.h, so we just use
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# a dummy file here.
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case $host in
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*-*-hpux*) need_tas=yes; tas_file=hpux.s ;;
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hppa*-*-hpux*) need_tas=yes; tas_file=hpux_hppa.s ;;
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sparc-*-solaris*) need_tas=yes; tas_file=solaris_sparc.s ;;
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i?86-*-solaris*) need_tas=yes; tas_file=solaris_i386.s ;;
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*) need_tas=no; tas_file=dummy.s ;;
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@ -1,8 +1,12 @@
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/*
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* tas() for HPPA.
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*
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* To generate tas.s using this template:
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* 1. cc +O2 -S -c tas.c
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* 2. edit tas.s:
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* - replace the LDW with LDCWX
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* 3. install as src/backend/port/tas/hpux_hppa.s.
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*
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* For details about the LDCWX instruction, see the "Precision
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* Architecture and Instruction Reference Manual" (09740-90014 of June
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* 1987), p. 5-38.
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@ -1,9 +1,3 @@
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#define HAS_TEST_AND_SET
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typedef struct
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{
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int sema[4];
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} slock_t;
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#ifndef BIG_ENDIAN
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#define BIG_ENDIAN 4321
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#endif
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@ -13,7 +7,28 @@ typedef struct
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#ifndef PDP_ENDIAN
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#define PDP_ENDIAN 3412
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#endif
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#if defined(__hppa)
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#define HAS_TEST_AND_SET
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typedef struct
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{
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int sema[4];
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} slock_t;
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#ifndef BYTE_ORDER
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#define BYTE_ORDER BIG_ENDIAN
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#endif
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#elif defined(__ia64)
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#define HAS_TEST_AND_SET
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typedef unsigned int slock_t;
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#ifndef BYTE_ORDER
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#define BYTE_ORDER LITTLE_ENDIAN
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#endif
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#else
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#error unrecognized CPU type for HP-UX
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#endif
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@ -63,7 +63,7 @@
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* Portions Copyright (c) 1996-2002, PostgreSQL Global Development Group
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* Portions Copyright (c) 1994, Regents of the University of California
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*
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* $Id: s_lock.h,v 1.110 2003/07/20 04:31:32 momjian Exp $
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* $Id: s_lock.h,v 1.111 2003/08/01 19:12:52 tgl Exp $
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*
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*-------------------------------------------------------------------------
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*/
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@ -114,7 +114,7 @@ tas(volatile slock_t *lock)
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/* Intel Itanium */
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#ifdef __ia64__
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#if defined(__ia64__) || defined(__ia64)
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#define TAS(lock) tas(lock)
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static __inline__ int
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@ -131,7 +131,7 @@ tas(volatile slock_t *lock)
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return (int) ret;
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}
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#endif /* __ia64__ */
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#endif /* __ia64__ || __ia64 */
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#if defined(__arm__) || defined(__arm__)
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@ -368,8 +368,9 @@ tas(volatile slock_t *s_lock)
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/*************************************************************************
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* These are the platforms that do not use inline assembler (and hence
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* have common code for gcc and non-gcc compilers, if both are available).
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* These are the platforms that have only one compiler, or do not use inline
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* assembler (and hence have common code for gcc and non-gcc compilers,
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* if both are available).
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*/
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@ -437,9 +438,9 @@ tas(volatile slock_t *lock)
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#endif /* __alpha */
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#if defined(__hpux)
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#if defined(__hppa)
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/*
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* HP-UX (PA-RISC)
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* HP's PA-RISC
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*
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* Note that slock_t on PA-RISC is a structure instead of char
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* (see include/port/hpux.h).
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@ -459,7 +460,7 @@ tas(volatile slock_t *lock)
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#define S_LOCK_FREE(lock) ( *(int *) (((long) (lock) + 15) & ~15) != 0)
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#endif /* __hpux */
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#endif /* __hppa */
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#if defined(__QNX__) && defined(__WATCOMC__)
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/*
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