Since HPUX now exists for Itanium, we should decouple the assumption

that OS=hpux is the same as CPU=hppa.  First steps at doing this.
With these patches, we still work on hppa with either gcc or HP's cc.
We might work on hpux/itanium with gcc, but I can't test it.  Definitely
will not work on hpux/itanium with non-gcc compiler, for lack of spinlock
code.
This commit is contained in:
Tom Lane 2003-08-01 19:12:52 +00:00
parent 75619cff56
commit 13ac54d1ca
6 changed files with 38 additions and 18 deletions

2
configure vendored
View File

@ -1453,7 +1453,7 @@ PORTNAME=$template
# assembler code in src/include/storage/s_lock.h, so we just use # assembler code in src/include/storage/s_lock.h, so we just use
# a dummy file here. # a dummy file here.
case $host in case $host in
*-*-hpux*) need_tas=yes; tas_file=hpux.s ;; hppa*-*-hpux*) need_tas=yes; tas_file=hpux_hppa.s ;;
sparc-*-solaris*) need_tas=yes; tas_file=solaris_sparc.s ;; sparc-*-solaris*) need_tas=yes; tas_file=solaris_sparc.s ;;
i?86-*-solaris*) need_tas=yes; tas_file=solaris_i386.s ;; i?86-*-solaris*) need_tas=yes; tas_file=solaris_i386.s ;;
*) need_tas=no; tas_file=dummy.s ;; *) need_tas=no; tas_file=dummy.s ;;

View File

@ -1,5 +1,5 @@
dnl Process this file with autoconf to produce a configure script. dnl Process this file with autoconf to produce a configure script.
dnl $Header: /cvsroot/pgsql/configure.in,v 1.271 2003/08/01 03:10:03 momjian Exp $ dnl $Header: /cvsroot/pgsql/configure.in,v 1.272 2003/08/01 19:12:52 tgl Exp $
dnl dnl
dnl Developers, please strive to achieve this order: dnl Developers, please strive to achieve this order:
dnl dnl
@ -108,7 +108,7 @@ AC_SUBST(PORTNAME)
# assembler code in src/include/storage/s_lock.h, so we just use # assembler code in src/include/storage/s_lock.h, so we just use
# a dummy file here. # a dummy file here.
case $host in case $host in
*-*-hpux*) need_tas=yes; tas_file=hpux.s ;; hppa*-*-hpux*) need_tas=yes; tas_file=hpux_hppa.s ;;
sparc-*-solaris*) need_tas=yes; tas_file=solaris_sparc.s ;; sparc-*-solaris*) need_tas=yes; tas_file=solaris_sparc.s ;;
i?86-*-solaris*) need_tas=yes; tas_file=solaris_i386.s ;; i?86-*-solaris*) need_tas=yes; tas_file=solaris_i386.s ;;
*) need_tas=no; tas_file=dummy.s ;; *) need_tas=no; tas_file=dummy.s ;;

View File

@ -1,8 +1,12 @@
/* /*
* tas() for HPPA.
*
* To generate tas.s using this template: * To generate tas.s using this template:
* 1. cc +O2 -S -c tas.c * 1. cc +O2 -S -c tas.c
* 2. edit tas.s: * 2. edit tas.s:
* - replace the LDW with LDCWX * - replace the LDW with LDCWX
* 3. install as src/backend/port/tas/hpux_hppa.s.
*
* For details about the LDCWX instruction, see the "Precision * For details about the LDCWX instruction, see the "Precision
* Architecture and Instruction Reference Manual" (09740-90014 of June * Architecture and Instruction Reference Manual" (09740-90014 of June
* 1987), p. 5-38. * 1987), p. 5-38.

View File

@ -1,9 +1,3 @@
#define HAS_TEST_AND_SET
typedef struct
{
int sema[4];
} slock_t;
#ifndef BIG_ENDIAN #ifndef BIG_ENDIAN
#define BIG_ENDIAN 4321 #define BIG_ENDIAN 4321
#endif #endif
@ -13,7 +7,28 @@ typedef struct
#ifndef PDP_ENDIAN #ifndef PDP_ENDIAN
#define PDP_ENDIAN 3412 #define PDP_ENDIAN 3412
#endif #endif
#if defined(__hppa)
#define HAS_TEST_AND_SET
typedef struct
{
int sema[4];
} slock_t;
#ifndef BYTE_ORDER #ifndef BYTE_ORDER
#define BYTE_ORDER BIG_ENDIAN #define BYTE_ORDER BIG_ENDIAN
#endif
#elif defined(__ia64)
#define HAS_TEST_AND_SET
typedef unsigned int slock_t;
#ifndef BYTE_ORDER
#define BYTE_ORDER LITTLE_ENDIAN
#endif
#else
#error unrecognized CPU type for HP-UX
#endif #endif

View File

@ -63,7 +63,7 @@
* Portions Copyright (c) 1996-2002, PostgreSQL Global Development Group * Portions Copyright (c) 1996-2002, PostgreSQL Global Development Group
* Portions Copyright (c) 1994, Regents of the University of California * Portions Copyright (c) 1994, Regents of the University of California
* *
* $Id: s_lock.h,v 1.110 2003/07/20 04:31:32 momjian Exp $ * $Id: s_lock.h,v 1.111 2003/08/01 19:12:52 tgl Exp $
* *
*------------------------------------------------------------------------- *-------------------------------------------------------------------------
*/ */
@ -114,7 +114,7 @@ tas(volatile slock_t *lock)
/* Intel Itanium */ /* Intel Itanium */
#ifdef __ia64__ #if defined(__ia64__) || defined(__ia64)
#define TAS(lock) tas(lock) #define TAS(lock) tas(lock)
static __inline__ int static __inline__ int
@ -131,7 +131,7 @@ tas(volatile slock_t *lock)
return (int) ret; return (int) ret;
} }
#endif /* __ia64__ */ #endif /* __ia64__ || __ia64 */
#if defined(__arm__) || defined(__arm__) #if defined(__arm__) || defined(__arm__)
@ -368,8 +368,9 @@ tas(volatile slock_t *s_lock)
/************************************************************************* /*************************************************************************
* These are the platforms that do not use inline assembler (and hence * These are the platforms that have only one compiler, or do not use inline
* have common code for gcc and non-gcc compilers, if both are available). * assembler (and hence have common code for gcc and non-gcc compilers,
* if both are available).
*/ */
@ -437,9 +438,9 @@ tas(volatile slock_t *lock)
#endif /* __alpha */ #endif /* __alpha */
#if defined(__hpux) #if defined(__hppa)
/* /*
* HP-UX (PA-RISC) * HP's PA-RISC
* *
* Note that slock_t on PA-RISC is a structure instead of char * Note that slock_t on PA-RISC is a structure instead of char
* (see include/port/hpux.h). * (see include/port/hpux.h).
@ -459,7 +460,7 @@ tas(volatile slock_t *lock)
#define S_LOCK_FREE(lock) ( *(int *) (((long) (lock) + 15) & ~15) != 0) #define S_LOCK_FREE(lock) ( *(int *) (((long) (lock) + 15) & ~15) != 0)
#endif /* __hpux */ #endif /* __hppa */
#if defined(__QNX__) && defined(__WATCOMC__) #if defined(__QNX__) && defined(__WATCOMC__)
/* /*