Abstract some more architecture-specific details away from SIMD functionality
Add a typedef to represent vectors containing four 32-bit integers, and add functions operating on them. Also separate out saturating subtraction into its own function. The motivation for this is to prepare for a future commit to add ARM NEON support. Nathan Bossart Reviewed by John Naylor and Tom Lane Discussion: https://www.postgresql.org/message-id/flat/CAFBsxsEyR9JkfbPcDXBRYEfdfC__OkwVGdwEAgY4Rv0cvw35EA%40mail.gmail.com#aba7a64b11503494ffd8dd27067626a9
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John Naylor
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@ -91,16 +91,19 @@ pg_lfind32(uint32 key, uint32 *base, uint32 nelem)
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{
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uint32 i = 0;
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#ifdef USE_SSE2
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#ifndef USE_NO_SIMD
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/*
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* A 16-byte register only has four 4-byte lanes. For better
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* instruction-level parallelism, each loop iteration operates on a block
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* of four registers. Testing has showed this is ~40% faster than using a
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* block of two registers.
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* For better instruction-level parallelism, each loop iteration operates
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* on a block of four registers. Testing for SSE2 has showed this is ~40%
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* faster than using a block of two registers.
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*/
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const __m128i keys = _mm_set1_epi32(key); /* load 4 copies of key */
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uint32 iterations = nelem & ~0xF; /* round down to multiple of 16 */
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const Vector32 keys = vector32_broadcast(key); /* load copies of key */
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const uint32 nelem_per_vector = sizeof(Vector32) / sizeof(uint32);
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const uint32 nelem_per_iteration = 4 * nelem_per_vector;
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/* round down to multiple of elements per iteration */
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const uint32 tail_idx = nelem & ~(nelem_per_iteration - 1);
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#if defined(USE_ASSERT_CHECKING)
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bool assert_result = false;
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@ -116,49 +119,59 @@ pg_lfind32(uint32 key, uint32 *base, uint32 nelem)
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}
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#endif
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for (i = 0; i < iterations; i += 16)
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for (i = 0; i < tail_idx; i += nelem_per_iteration)
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{
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/* load the next block into 4 registers holding 4 values each */
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const __m128i vals1 = _mm_loadu_si128((__m128i *) & base[i]);
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const __m128i vals2 = _mm_loadu_si128((__m128i *) & base[i + 4]);
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const __m128i vals3 = _mm_loadu_si128((__m128i *) & base[i + 8]);
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const __m128i vals4 = _mm_loadu_si128((__m128i *) & base[i + 12]);
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Vector32 vals1,
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vals2,
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vals3,
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vals4,
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result1,
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result2,
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result3,
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result4,
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tmp1,
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tmp2,
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result;
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/* load the next block into 4 registers */
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vector32_load(&vals1, &base[i]);
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vector32_load(&vals2, &base[i + nelem_per_vector]);
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vector32_load(&vals3, &base[i + nelem_per_vector * 2]);
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vector32_load(&vals4, &base[i + nelem_per_vector * 3]);
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/* compare each value to the key */
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const __m128i result1 = _mm_cmpeq_epi32(keys, vals1);
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const __m128i result2 = _mm_cmpeq_epi32(keys, vals2);
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const __m128i result3 = _mm_cmpeq_epi32(keys, vals3);
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const __m128i result4 = _mm_cmpeq_epi32(keys, vals4);
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result1 = vector32_eq(keys, vals1);
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result2 = vector32_eq(keys, vals2);
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result3 = vector32_eq(keys, vals3);
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result4 = vector32_eq(keys, vals4);
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/* combine the results into a single variable */
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const __m128i tmp1 = _mm_or_si128(result1, result2);
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const __m128i tmp2 = _mm_or_si128(result3, result4);
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const __m128i result = _mm_or_si128(tmp1, tmp2);
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tmp1 = vector32_or(result1, result2);
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tmp2 = vector32_or(result3, result4);
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result = vector32_or(tmp1, tmp2);
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/* see if there was a match */
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if (_mm_movemask_epi8(result) != 0)
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if (vector8_is_highbit_set((Vector8) result))
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{
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#if defined(USE_ASSERT_CHECKING)
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Assert(assert_result == true);
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#endif
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return true;
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}
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}
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#endif /* USE_SSE2 */
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#endif /* ! USE_NO_SIMD */
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/* Process the remaining elements one at a time. */
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for (; i < nelem; i++)
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{
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if (key == base[i])
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{
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#if defined(USE_SSE2) && defined(USE_ASSERT_CHECKING)
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#ifndef USE_NO_SIMD
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Assert(assert_result == true);
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#endif
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return true;
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}
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}
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#if defined(USE_SSE2) && defined(USE_ASSERT_CHECKING)
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#ifndef USE_NO_SIMD
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Assert(assert_result == false);
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#endif
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return false;
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@ -31,22 +31,32 @@
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#include <emmintrin.h>
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#define USE_SSE2
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typedef __m128i Vector8;
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typedef __m128i Vector32;
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#else
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/*
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* If no SIMD instructions are available, we can in some cases emulate vector
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* operations using bitwise operations on unsigned integers.
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* operations using bitwise operations on unsigned integers. Note that many
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* of the functions in this file presently do not have non-SIMD
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* implementations. In particular, none of the functions involving Vector32
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* are implemented without SIMD since it's likely not worthwhile to represent
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* two 32-bit integers using a uint64.
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*/
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#define USE_NO_SIMD
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typedef uint64 Vector8;
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#endif
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/* load/store operations */
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static inline void vector8_load(Vector8 *v, const uint8 *s);
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#ifndef USE_NO_SIMD
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static inline void vector32_load(Vector32 *v, const uint32 *s);
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#endif
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/* assignment operations */
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static inline Vector8 vector8_broadcast(const uint8 c);
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#ifndef USE_NO_SIMD
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static inline Vector32 vector32_broadcast(const uint32 c);
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#endif
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/* element-wise comparisons to a scalar */
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static inline bool vector8_has(const Vector8 v, const uint8 c);
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@ -56,14 +66,21 @@ static inline bool vector8_is_highbit_set(const Vector8 v);
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/* arithmetic operations */
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static inline Vector8 vector8_or(const Vector8 v1, const Vector8 v2);
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/* Different semantics for SIMD architectures. */
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#ifndef USE_NO_SIMD
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static inline Vector32 vector32_or(const Vector32 v1, const Vector32 v2);
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static inline Vector8 vector8_ssub(const Vector8 v1, const Vector8 v2);
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#endif
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/* comparisons between vectors */
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/*
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* comparisons between vectors
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*
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* Note: These return a vector rather than booloan, which is why we don't
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* have non-SIMD implementations.
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*/
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#ifndef USE_NO_SIMD
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static inline Vector8 vector8_eq(const Vector8 v1, const Vector8 v2);
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#endif /* ! USE_NO_SIMD */
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static inline Vector32 vector32_eq(const Vector32 v1, const Vector32 v2);
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#endif
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/*
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* Load a chunk of memory into the given vector.
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@ -78,6 +95,15 @@ vector8_load(Vector8 *v, const uint8 *s)
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#endif
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}
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#ifndef USE_NO_SIMD
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static inline void
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vector32_load(Vector32 *v, const uint32 *s)
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{
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#ifdef USE_SSE2
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*v = _mm_loadu_si128((const __m128i *) s);
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#endif
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}
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#endif /* ! USE_NO_SIMD */
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/*
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* Create a vector with all elements set to the same value.
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@ -92,6 +118,16 @@ vector8_broadcast(const uint8 c)
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#endif
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}
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#ifndef USE_NO_SIMD
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static inline Vector32
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vector32_broadcast(const uint32 c)
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{
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#ifdef USE_SSE2
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return _mm_set1_epi32(c);
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#endif
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}
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#endif /* ! USE_NO_SIMD */
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/*
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* Return true if any elements in the vector are equal to the given scalar.
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*/
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@ -118,7 +154,7 @@ vector8_has(const Vector8 v, const uint8 c)
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/* any bytes in v equal to c will evaluate to zero via XOR */
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result = vector8_has_zero(v ^ vector8_broadcast(c));
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#elif defined(USE_SSE2)
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result = _mm_movemask_epi8(_mm_cmpeq_epi8(v, vector8_broadcast(c)));
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result = vector8_is_highbit_set(vector8_eq(v, vector8_broadcast(c)));
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#endif
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Assert(assert_result == result);
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@ -133,8 +169,8 @@ vector8_has_zero(const Vector8 v)
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{
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#if defined(USE_NO_SIMD)
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/*
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* We cannot call vector8_has() here, because that would lead to a circular
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* definition.
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* We cannot call vector8_has() here, because that would lead to a
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* circular definition.
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*/
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return vector8_has_le(v, 0);
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#elif defined(USE_SSE2)
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@ -150,9 +186,6 @@ static inline bool
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vector8_has_le(const Vector8 v, const uint8 c)
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{
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bool result = false;
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#if defined(USE_SSE2)
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__m128i sub;
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#endif
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/* pre-compute the result for assert checking */
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#ifdef USE_ASSERT_CHECKING
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@ -194,10 +227,10 @@ vector8_has_le(const Vector8 v, const uint8 c)
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/*
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* Use saturating subtraction to find bytes <= c, which will present as
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* NUL bytes in 'sub'.
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* NUL bytes. This approach is a workaround for the lack of unsigned
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* comparison instructions on some architectures.
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*/
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sub = _mm_subs_epu8(v, vector8_broadcast(c));
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result = vector8_has_zero(sub);
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result = vector8_has_zero(vector8_ssub(v, vector8_broadcast(c)));
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#endif
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Assert(assert_result == result);
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@ -230,14 +263,37 @@ vector8_or(const Vector8 v1, const Vector8 v2)
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#endif
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}
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/* Different semantics for SIMD architectures. */
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#ifndef USE_NO_SIMD
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static inline Vector32
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vector32_or(const Vector32 v1, const Vector32 v2)
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{
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#ifdef USE_SSE2
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return _mm_or_si128(v1, v2);
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#endif
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}
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#endif /* ! USE_NO_SIMD */
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/*
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* Return the result of subtracting the respective elements of the input
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* vectors using saturation (i.e., if the operation would yield a value less
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* than zero, zero is returned instead). For more information on saturation
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* arithmetic, see https://en.wikipedia.org/wiki/Saturation_arithmetic
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*/
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#ifndef USE_NO_SIMD
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static inline Vector8
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vector8_ssub(const Vector8 v1, const Vector8 v2)
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{
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#ifdef USE_SSE2
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return _mm_subs_epu8(v1, v2);
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#endif
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}
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#endif /* ! USE_NO_SIMD */
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/*
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* Return a vector with all bits set in each lane where the the corresponding
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* lanes in the inputs are equal.
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*/
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#ifndef USE_NO_SIMD
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static inline Vector8
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vector8_eq(const Vector8 v1, const Vector8 v2)
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{
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@ -245,7 +301,16 @@ vector8_eq(const Vector8 v1, const Vector8 v2)
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return _mm_cmpeq_epi8(v1, v2);
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#endif
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}
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#endif /* ! USE_NO_SIMD */
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#ifndef USE_NO_SIMD
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static inline Vector32
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vector32_eq(const Vector32 v1, const Vector32 v2)
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{
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#ifdef USE_SSE2
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return _mm_cmpeq_epi32(v1, v2);
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#endif
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}
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#endif /* ! USE_NO_SIMD */
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#endif /* SIMD_H */
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