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Merge pull request #3451 from ReinUsesLisp/indexed-textures
vk_shader_decompiler: Implement indexed textures
This commit is contained in:
commit
0361aa1915
@ -36,6 +36,7 @@ namespace OpenGL {
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using Maxwell = Tegra::Engines::Maxwell3D::Regs;
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using Tegra::Engines::ShaderType;
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using VideoCore::Surface::PixelFormat;
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using VideoCore::Surface::SurfaceTarget;
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using VideoCore::Surface::SurfaceType;
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@ -56,8 +57,7 @@ namespace {
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template <typename Engine, typename Entry>
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Tegra::Texture::FullTextureInfo GetTextureInfo(const Engine& engine, const Entry& entry,
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Tegra::Engines::ShaderType shader_type,
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std::size_t index = 0) {
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ShaderType shader_type, std::size_t index = 0) {
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if (entry.IsBindless()) {
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const Tegra::Texture::TextureHandle tex_handle =
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engine.AccessConstBuffer32(shader_type, entry.GetBuffer(), entry.GetOffset());
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@ -910,15 +910,10 @@ void RasterizerOpenGL::SetupDrawTextures(std::size_t stage_index, const Shader&
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const auto& maxwell3d = system.GPU().Maxwell3D();
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u32 binding = device.GetBaseBindings(stage_index).sampler;
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for (const auto& entry : shader->GetShaderEntries().samplers) {
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const auto shader_type = static_cast<Tegra::Engines::ShaderType>(stage_index);
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if (!entry.IsIndexed()) {
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const auto texture = GetTextureInfo(maxwell3d, entry, shader_type);
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const auto shader_type = static_cast<ShaderType>(stage_index);
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for (std::size_t i = 0; i < entry.Size(); ++i) {
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const auto texture = GetTextureInfo(maxwell3d, entry, shader_type, i);
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SetupTexture(binding++, texture, entry);
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} else {
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for (std::size_t i = 0; i < entry.Size(); ++i) {
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const auto texture = GetTextureInfo(maxwell3d, entry, shader_type, i);
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SetupTexture(binding++, texture, entry);
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}
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}
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}
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}
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@ -928,16 +923,9 @@ void RasterizerOpenGL::SetupComputeTextures(const Shader& kernel) {
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const auto& compute = system.GPU().KeplerCompute();
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u32 binding = 0;
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for (const auto& entry : kernel->GetShaderEntries().samplers) {
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if (!entry.IsIndexed()) {
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const auto texture =
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GetTextureInfo(compute, entry, Tegra::Engines::ShaderType::Compute);
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for (std::size_t i = 0; i < entry.Size(); ++i) {
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const auto texture = GetTextureInfo(compute, entry, ShaderType::Compute, i);
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SetupTexture(binding++, texture, entry);
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} else {
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for (std::size_t i = 0; i < entry.Size(); ++i) {
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const auto texture =
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GetTextureInfo(compute, entry, Tegra::Engines::ShaderType::Compute, i);
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SetupTexture(binding++, texture, entry);
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}
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}
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}
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}
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@ -73,7 +73,7 @@ UniqueDescriptorUpdateTemplate VKComputePipeline::CreateDescriptorUpdateTemplate
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std::vector<vk::DescriptorUpdateTemplateEntry> template_entries;
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u32 binding = 0;
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u32 offset = 0;
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FillDescriptorUpdateTemplateEntries(device, entries, binding, offset, template_entries);
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FillDescriptorUpdateTemplateEntries(entries, binding, offset, template_entries);
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if (template_entries.empty()) {
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// If the shader doesn't use descriptor sets, skip template creation.
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return UniqueDescriptorUpdateTemplate{};
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@ -97,8 +97,7 @@ UniqueDescriptorUpdateTemplate VKGraphicsPipeline::CreateDescriptorUpdateTemplat
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u32 offset = 0;
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for (const auto& stage : program) {
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if (stage) {
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FillDescriptorUpdateTemplateEntries(device, stage->entries, binding, offset,
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template_entries);
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FillDescriptorUpdateTemplateEntries(stage->entries, binding, offset, template_entries);
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}
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}
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if (template_entries.empty()) {
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@ -36,6 +36,13 @@ using Tegra::Engines::ShaderType;
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namespace {
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// C++20's using enum
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constexpr auto eUniformBuffer = vk::DescriptorType::eUniformBuffer;
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constexpr auto eStorageBuffer = vk::DescriptorType::eStorageBuffer;
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constexpr auto eUniformTexelBuffer = vk::DescriptorType::eUniformTexelBuffer;
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constexpr auto eCombinedImageSampler = vk::DescriptorType::eCombinedImageSampler;
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constexpr auto eStorageImage = vk::DescriptorType::eStorageImage;
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constexpr VideoCommon::Shader::CompilerSettings compiler_settings{
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VideoCommon::Shader::CompileDepth::FullDecompile};
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@ -119,23 +126,32 @@ ShaderType GetShaderType(Maxwell::ShaderProgram program) {
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}
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}
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template <vk::DescriptorType descriptor_type, class Container>
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void AddBindings(std::vector<vk::DescriptorSetLayoutBinding>& bindings, u32& binding,
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vk::ShaderStageFlags stage_flags, const Container& container) {
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const u32 num_entries = static_cast<u32>(std::size(container));
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for (std::size_t i = 0; i < num_entries; ++i) {
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u32 count = 1;
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if constexpr (descriptor_type == eCombinedImageSampler) {
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// Combined image samplers can be arrayed.
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count = container[i].Size();
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}
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bindings.emplace_back(binding++, descriptor_type, count, stage_flags, nullptr);
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}
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}
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u32 FillDescriptorLayout(const ShaderEntries& entries,
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std::vector<vk::DescriptorSetLayoutBinding>& bindings,
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Maxwell::ShaderProgram program_type, u32 base_binding) {
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const ShaderType stage = GetStageFromProgram(program_type);
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const vk::ShaderStageFlags stage_flags = MaxwellToVK::ShaderStage(stage);
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const vk::ShaderStageFlags flags = MaxwellToVK::ShaderStage(stage);
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u32 binding = base_binding;
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const auto AddBindings = [&](vk::DescriptorType descriptor_type, std::size_t num_entries) {
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for (std::size_t i = 0; i < num_entries; ++i) {
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bindings.emplace_back(binding++, descriptor_type, 1, stage_flags, nullptr);
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}
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};
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AddBindings(vk::DescriptorType::eUniformBuffer, entries.const_buffers.size());
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AddBindings(vk::DescriptorType::eStorageBuffer, entries.global_buffers.size());
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AddBindings(vk::DescriptorType::eUniformTexelBuffer, entries.texel_buffers.size());
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AddBindings(vk::DescriptorType::eCombinedImageSampler, entries.samplers.size());
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AddBindings(vk::DescriptorType::eStorageImage, entries.images.size());
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AddBindings<eUniformBuffer>(bindings, binding, flags, entries.const_buffers);
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AddBindings<eStorageBuffer>(bindings, binding, flags, entries.global_buffers);
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AddBindings<eUniformTexelBuffer>(bindings, binding, flags, entries.texel_buffers);
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AddBindings<eCombinedImageSampler>(bindings, binding, flags, entries.samplers);
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AddBindings<eStorageImage>(bindings, binding, flags, entries.images);
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return binding;
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}
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@ -361,32 +377,45 @@ VKPipelineCache::DecompileShaders(const GraphicsPipelineCacheKey& key) {
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return {std::move(program), std::move(bindings)};
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}
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void FillDescriptorUpdateTemplateEntries(
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const VKDevice& device, const ShaderEntries& entries, u32& binding, u32& offset,
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std::vector<vk::DescriptorUpdateTemplateEntry>& template_entries) {
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static constexpr auto entry_size = static_cast<u32>(sizeof(DescriptorUpdateEntry));
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const auto AddEntry = [&](vk::DescriptorType descriptor_type, std::size_t count_) {
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const u32 count = static_cast<u32>(count_);
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if (descriptor_type == vk::DescriptorType::eUniformTexelBuffer &&
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device.GetDriverID() == vk::DriverIdKHR::eNvidiaProprietary) {
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// Nvidia has a bug where updating multiple uniform texels at once causes the driver to
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// crash.
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for (u32 i = 0; i < count; ++i) {
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template_entries.emplace_back(binding + i, 0, 1, descriptor_type,
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offset + i * entry_size, entry_size);
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}
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} else if (count != 0) {
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template_entries.emplace_back(binding, 0, count, descriptor_type, offset, entry_size);
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}
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offset += count * entry_size;
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binding += count;
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};
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template <vk::DescriptorType descriptor_type, class Container>
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void AddEntry(std::vector<vk::DescriptorUpdateTemplateEntry>& template_entries, u32& binding,
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u32& offset, const Container& container) {
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static constexpr u32 entry_size = static_cast<u32>(sizeof(DescriptorUpdateEntry));
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const u32 count = static_cast<u32>(std::size(container));
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AddEntry(vk::DescriptorType::eUniformBuffer, entries.const_buffers.size());
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AddEntry(vk::DescriptorType::eStorageBuffer, entries.global_buffers.size());
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AddEntry(vk::DescriptorType::eUniformTexelBuffer, entries.texel_buffers.size());
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AddEntry(vk::DescriptorType::eCombinedImageSampler, entries.samplers.size());
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AddEntry(vk::DescriptorType::eStorageImage, entries.images.size());
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if constexpr (descriptor_type == eCombinedImageSampler) {
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for (u32 i = 0; i < count; ++i) {
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const u32 num_samplers = container[i].Size();
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template_entries.emplace_back(binding, 0, num_samplers, descriptor_type, offset,
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entry_size);
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++binding;
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offset += num_samplers * entry_size;
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}
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return;
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}
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if constexpr (descriptor_type == eUniformTexelBuffer) {
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// Nvidia has a bug where updating multiple uniform texels at once causes the driver to
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// crash.
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for (u32 i = 0; i < count; ++i) {
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template_entries.emplace_back(binding + i, 0, 1, descriptor_type,
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offset + i * entry_size, entry_size);
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}
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} else if (count > 0) {
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template_entries.emplace_back(binding, 0, count, descriptor_type, offset, entry_size);
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}
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offset += count * entry_size;
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binding += count;
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}
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void FillDescriptorUpdateTemplateEntries(
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const ShaderEntries& entries, u32& binding, u32& offset,
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std::vector<vk::DescriptorUpdateTemplateEntry>& template_entries) {
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AddEntry<eUniformBuffer>(template_entries, offset, binding, entries.const_buffers);
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AddEntry<eStorageBuffer>(template_entries, offset, binding, entries.global_buffers);
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AddEntry<eUniformTexelBuffer>(template_entries, offset, binding, entries.texel_buffers);
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AddEntry<eCombinedImageSampler>(template_entries, offset, binding, entries.samplers);
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AddEntry<eStorageImage>(template_entries, offset, binding, entries.images);
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}
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} // namespace Vulkan
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@ -194,7 +194,7 @@ private:
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};
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void FillDescriptorUpdateTemplateEntries(
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const VKDevice& device, const ShaderEntries& entries, u32& binding, u32& offset,
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const ShaderEntries& entries, u32& binding, u32& offset,
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std::vector<vk::DescriptorUpdateTemplateEntry>& template_entries);
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} // namespace Vulkan
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@ -105,17 +105,20 @@ void TransitionImages(const std::vector<ImageView>& views, vk::PipelineStageFlag
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template <typename Engine, typename Entry>
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Tegra::Texture::FullTextureInfo GetTextureInfo(const Engine& engine, const Entry& entry,
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std::size_t stage) {
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std::size_t stage, std::size_t index = 0) {
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const auto stage_type = static_cast<Tegra::Engines::ShaderType>(stage);
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if (entry.IsBindless()) {
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const Tegra::Texture::TextureHandle tex_handle =
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engine.AccessConstBuffer32(stage_type, entry.GetBuffer(), entry.GetOffset());
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return engine.GetTextureInfo(tex_handle);
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}
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const auto& gpu_profile = engine.AccessGuestDriverProfile();
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const u32 entry_offset = static_cast<u32>(index * gpu_profile.GetTextureHandlerSize());
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const u32 offset = entry.GetOffset() + entry_offset;
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if constexpr (std::is_same_v<Engine, Tegra::Engines::Maxwell3D>) {
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return engine.GetStageTexture(stage_type, entry.GetOffset());
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return engine.GetStageTexture(stage_type, offset);
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} else {
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return engine.GetTexture(entry.GetOffset());
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return engine.GetTexture(offset);
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}
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}
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@ -836,8 +839,10 @@ void RasterizerVulkan::SetupGraphicsTextures(const ShaderEntries& entries, std::
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MICROPROFILE_SCOPE(Vulkan_Textures);
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const auto& gpu = system.GPU().Maxwell3D();
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for (const auto& entry : entries.samplers) {
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const auto texture = GetTextureInfo(gpu, entry, stage);
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SetupTexture(texture, entry);
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for (std::size_t i = 0; i < entry.Size(); ++i) {
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const auto texture = GetTextureInfo(gpu, entry, stage, i);
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SetupTexture(texture, entry);
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}
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}
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}
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@ -886,8 +891,10 @@ void RasterizerVulkan::SetupComputeTextures(const ShaderEntries& entries) {
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MICROPROFILE_SCOPE(Vulkan_Textures);
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const auto& gpu = system.GPU().KeplerCompute();
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for (const auto& entry : entries.samplers) {
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const auto texture = GetTextureInfo(gpu, entry, ComputeShaderIndex);
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SetupTexture(texture, entry);
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for (std::size_t i = 0; i < entry.Size(); ++i) {
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const auto texture = GetTextureInfo(gpu, entry, ComputeShaderIndex, i);
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SetupTexture(texture, entry);
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}
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}
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}
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@ -69,8 +69,9 @@ struct TexelBuffer {
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struct SampledImage {
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Id image_type{};
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Id sampled_image_type{};
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Id sampler{};
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Id sampler_type{};
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Id sampler_pointer_type{};
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Id variable{};
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};
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struct StorageImage {
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@ -833,16 +834,20 @@ private:
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constexpr int sampled = 1;
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constexpr auto format = spv::ImageFormat::Unknown;
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const Id image_type = TypeImage(t_float, dim, depth, arrayed, ms, sampled, format);
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const Id sampled_image_type = TypeSampledImage(image_type);
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const Id pointer_type =
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TypePointer(spv::StorageClass::UniformConstant, sampled_image_type);
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const Id sampler_type = TypeSampledImage(image_type);
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const Id sampler_pointer_type =
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TypePointer(spv::StorageClass::UniformConstant, sampler_type);
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const Id type = sampler.IsIndexed()
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? TypeArray(sampler_type, Constant(t_uint, sampler.Size()))
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: sampler_type;
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const Id pointer_type = TypePointer(spv::StorageClass::UniformConstant, type);
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const Id id = OpVariable(pointer_type, spv::StorageClass::UniformConstant);
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AddGlobalVariable(Name(id, fmt::format("sampler_{}", sampler.GetIndex())));
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Decorate(id, spv::Decoration::Binding, binding++);
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Decorate(id, spv::Decoration::DescriptorSet, DESCRIPTOR_SET);
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sampled_images.emplace(sampler.GetIndex(),
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SampledImage{image_type, sampled_image_type, id});
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sampled_images.emplace(sampler.GetIndex(), SampledImage{image_type, sampler_type,
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sampler_pointer_type, id});
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}
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return binding;
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}
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@ -1525,7 +1530,12 @@ private:
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ASSERT(!meta.sampler.IsBuffer());
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const auto& entry = sampled_images.at(meta.sampler.GetIndex());
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return OpLoad(entry.sampled_image_type, entry.sampler);
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Id sampler = entry.variable;
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if (meta.sampler.IsIndexed()) {
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const Id index = AsInt(Visit(meta.index));
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sampler = OpAccessChain(entry.sampler_pointer_type, sampler, index);
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}
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return OpLoad(entry.sampler_type, sampler);
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}
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Id GetTextureImage(Operation operation) {
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@ -299,7 +299,7 @@ private:
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u32 index{}; ///< Emulated index given for the this sampler.
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u32 offset{}; ///< Offset in the const buffer from where the sampler is being read.
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u32 buffer{}; ///< Buffer where the bindless sampler is being read (unused on bound samplers).
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u32 size{}; ///< Size of the sampler if indexed.
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u32 size{1}; ///< Size of the sampler.
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Tegra::Shader::TextureType type{}; ///< The type used to sample this texture (Texture2D, etc)
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bool is_array{}; ///< Whether the texture is being sampled as an array texture or not.
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