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shader_ir: Fixup TEX and TEXS and partially fix TLD4 decompiling
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2d9136cec6
commit
03e088a4f4
@ -183,28 +183,24 @@ u32 ShaderIR::DecodeMemory(BasicBlock& bb, u32 pc) {
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const Node texture = GetTexCode(instr, texture_type, process_mode, depth_compare, is_array);
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if (depth_compare) {
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SetRegister(bb, instr.gpr0, texture);
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} else {
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MetaComponents meta;
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std::array<Node, 4> dest;
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MetaComponents meta;
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std::array<Node, 4> dest;
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std::size_t dest_elem = 0;
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for (std::size_t elem = 0; elem < 4; ++elem) {
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if (!instr.tex.IsComponentEnabled(elem)) {
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// Skip disabled components
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continue;
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}
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meta.components_map[dest_elem] = static_cast<u32>(elem);
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dest[dest_elem] = GetRegister(instr.gpr0.Value() + dest_elem);
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++dest_elem;
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std::size_t dest_elem = 0;
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for (std::size_t elem = 0; elem < 4; ++elem) {
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if (!instr.tex.IsComponentEnabled(elem)) {
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// Skip disabled components
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continue;
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}
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std::generate(dest.begin() + dest_elem, dest.end(), [&]() { return GetRegister(RZ); });
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meta.components_map[dest_elem] = static_cast<u32>(elem);
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dest[dest_elem] = GetRegister(instr.gpr0.Value() + dest_elem);
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bb.push_back(Operation(OperationCode::AssignComposite, std::move(meta), texture,
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dest[0], dest[1], dest[2], dest[3]));
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++dest_elem;
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}
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std::generate(dest.begin() + dest_elem, dest.end(), [&]() { return GetRegister(RZ); });
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bb.push_back(Operation(OperationCode::AssignComposite, std::move(meta), texture, dest[0],
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dest[1], dest[2], dest[3]));
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break;
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}
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case OpCode::Id::TEXS: {
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@ -272,7 +268,7 @@ u32 ShaderIR::DecodeMemory(BasicBlock& bb, u32 pc) {
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params.push_back(Immediate(static_cast<u32>(instr.tld4.component)));
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const auto& sampler = GetSampler(instr.sampler, texture_type, false, depth_compare);
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const MetaTexture meta{sampler, num_coordinates};
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MetaTexture meta{sampler, num_coordinates};
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const Node texture =
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Operation(OperationCode::F4TextureGather, std::move(meta), std::move(params));
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@ -331,7 +327,7 @@ u32 ShaderIR::DecodeMemory(BasicBlock& bb, u32 pc) {
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const auto& sampler =
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GetSampler(instr.sampler, TextureType::Texture2D, false, depth_compare);
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const MetaTexture meta{sampler, num_coords};
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MetaTexture meta{sampler, num_coords};
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WriteTexsInstructionFloat(
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bb, instr, Operation(OperationCode::F4TextureGather, meta, std::move(params)));
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@ -350,7 +346,7 @@ u32 ShaderIR::DecodeMemory(BasicBlock& bb, u32 pc) {
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switch (instr.txq.query_type) {
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case Tegra::Shader::TextureQueryType::Dimension: {
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const MetaTexture meta_texture{sampler};
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MetaTexture meta_texture{sampler};
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const MetaComponents meta_components{{0, 1, 2, 3}};
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const Node texture = Operation(OperationCode::F4TextureQueryDimensions, meta_texture,
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@ -402,7 +398,7 @@ u32 ShaderIR::DecodeMemory(BasicBlock& bb, u32 pc) {
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texture_type = TextureType::Texture2D;
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}
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const MetaTexture meta_texture{sampler, static_cast<u32>(coords.size())};
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MetaTexture meta_texture{sampler, static_cast<u32>(coords.size())};
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const Node texture =
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Operation(OperationCode::F4TextureQueryLod, meta_texture, std::move(coords));
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@ -474,7 +470,8 @@ void ShaderIR::WriteTexsInstructionFloat(BasicBlock& bb, Tegra::Shader::Instruct
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Node ShaderIR::GetTextureCode(Instruction instr, TextureType texture_type,
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TextureProcessMode process_mode, bool depth_compare, bool is_array,
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std::size_t bias_offset, std::vector<Node>&& coords) {
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std::size_t array_offset, std::size_t bias_offset,
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std::vector<Node>&& coords) {
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UNIMPLEMENTED_IF_MSG(
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(texture_type == TextureType::Texture3D && (is_array || depth_compare)) ||
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(texture_type == TextureType::TextureCube && is_array && depth_compare),
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@ -486,26 +483,26 @@ Node ShaderIR::GetTextureCode(Instruction instr, TextureType texture_type,
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process_mode == TextureProcessMode::LL ||
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process_mode == TextureProcessMode::LLA;
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// LOD selection (either via bias or explicit textureLod) not supported in GL for
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// sampler2DArrayShadow and samplerCubeArrayShadow.
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const bool gl_lod_supported =
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!((texture_type == TextureType::Texture2D && is_array && depth_compare) ||
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(texture_type == TextureType::TextureCube && !is_array && depth_compare));
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!((texture_type == Tegra::Shader::TextureType::Texture2D && is_array && depth_compare) ||
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(texture_type == Tegra::Shader::TextureType::TextureCube && is_array && depth_compare));
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const OperationCode read_method =
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lod_needed && gl_lod_supported ? OperationCode::F4TextureLod : OperationCode::F4Texture;
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const MetaTexture meta{sampler, static_cast<u32>(coords.size())};
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UNIMPLEMENTED_IF(process_mode != TextureProcessMode::None && !gl_lod_supported);
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std::optional<u32> array_offset_value;
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if (is_array)
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array_offset_value = static_cast<u32>(array_offset);
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MetaTexture meta{sampler, static_cast<u32>(coords.size()), array_offset_value};
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std::vector<Node> params = std::move(coords);
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if (process_mode != TextureProcessMode::None) {
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if (process_mode != TextureProcessMode::None && gl_lod_supported) {
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if (process_mode == TextureProcessMode::LZ) {
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if (gl_lod_supported) {
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params.push_back(Immediate(0));
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} else {
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// Lod 0 is emulated by a big negative bias in scenarios that are not supported by
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// GLSL
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params.push_back(Immediate(-1000));
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}
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params.push_back(Immediate(0.0f));
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} else {
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// If present, lod or bias are always stored in the register indexed by the gpr20 field
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// with an offset depending on the usage of the other registers
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@ -518,8 +515,8 @@ Node ShaderIR::GetTextureCode(Instruction instr, TextureType texture_type,
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Node ShaderIR::GetTexCode(Instruction instr, TextureType texture_type,
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TextureProcessMode process_mode, bool depth_compare, bool is_array) {
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const bool lod_bias_enabled = (process_mode != Tegra::Shader::TextureProcessMode::None &&
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process_mode != Tegra::Shader::TextureProcessMode::LZ);
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const bool lod_bias_enabled =
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(process_mode != TextureProcessMode::None && process_mode != TextureProcessMode::LZ);
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const auto [coord_count, total_coord_count] = ValidateAndGetCoordinateElement(
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texture_type, depth_compare, is_array, lod_bias_enabled, 4, 5);
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@ -536,29 +533,30 @@ Node ShaderIR::GetTexCode(Instruction instr, TextureType texture_type,
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if (depth_compare && !is_array && texture_type == TextureType::Texture1D) {
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coords.push_back(Immediate(0.0f));
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}
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std::size_t array_offset{};
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if (is_array) {
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array_offset = coords.size();
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coords.push_back(GetRegister(array_register));
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}
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if (depth_compare) {
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// Depth is always stored in the register signaled by gpr20
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// or in the next register if lod or bias are used
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const u64 depth_register = instr.gpr20.Value() + (lod_bias_enabled ? 1 : 0);
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coords.push_back(GetRegister(depth_register));
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}
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if (is_array) {
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coords.push_back(GetRegister(array_register));
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}
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// Fill ignored coordinates
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while (coords.size() < total_coord_count) {
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coords.push_back(Immediate(0));
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}
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return GetTextureCode(instr, texture_type, process_mode, depth_compare, is_array, 0,
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std::move(coords));
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return GetTextureCode(instr, texture_type, process_mode, depth_compare, is_array, array_offset,
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0, std::move(coords));
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}
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Node ShaderIR::GetTexsCode(Instruction instr, TextureType texture_type,
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TextureProcessMode process_mode, bool depth_compare, bool is_array) {
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const bool lod_bias_enabled = (process_mode != Tegra::Shader::TextureProcessMode::None &&
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process_mode != Tegra::Shader::TextureProcessMode::LZ);
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const bool lod_bias_enabled =
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(process_mode != TextureProcessMode::None && process_mode != TextureProcessMode::LZ);
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const auto [coord_count, total_coord_count] = ValidateAndGetCoordinateElement(
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texture_type, depth_compare, is_array, lod_bias_enabled, 4, 4);
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@ -577,22 +575,23 @@ Node ShaderIR::GetTexsCode(Instruction instr, TextureType texture_type,
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coords.push_back(GetRegister(last ? last_coord_register : coord_register + i));
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}
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std::size_t array_offset{};
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if (is_array) {
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array_offset = coords.size();
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coords.push_back(GetRegister(array_register));
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}
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if (depth_compare) {
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// Depth is always stored in the register signaled by gpr20
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// or in the next register if lod or bias are used
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const u64 depth_register = instr.gpr20.Value() + (lod_bias_enabled ? 1 : 0);
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coords.push_back(GetRegister(depth_register));
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}
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if (is_array) {
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coords.push_back(
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Operation(OperationCode::ICastFloat, NO_PRECISE, GetRegister(array_register)));
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}
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// Fill ignored coordinates
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while (coords.size() < total_coord_count) {
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coords.push_back(Immediate(0));
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}
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return GetTextureCode(instr, texture_type, process_mode, depth_compare, is_array,
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return GetTextureCode(instr, texture_type, process_mode, depth_compare, is_array, array_offset,
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(coord_count > 2 ? 1 : 0), std::move(coords));
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}
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@ -635,8 +635,10 @@ private:
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result_type));
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}
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#pragma optimize("", off)
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std::string GenerateTexture(Operation operation, const std::string& func,
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const std::string& extra_cast = "") {
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std::string extra_cast(std::string) = nullptr) {
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constexpr std::array<const char*, 4> coord_constructors = {"float", "vec2", "vec3", "vec4"};
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const auto& meta = std::get<MetaTexture>(operation.GetMeta());
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@ -651,15 +653,17 @@ private:
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expr += '(';
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for (u32 i = 0; i < count; ++i) {
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const bool is_extra = i >= meta.coords_count;
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const bool do_cast = is_extra && !extra_cast.empty();
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if (do_cast) {
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expr += extra_cast;
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expr += '(';
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const bool is_array = i == meta.array_index;
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std::string operand = Visit(operation[i]);
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if (is_extra && extra_cast != nullptr) {
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operand = extra_cast(operand);
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}
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expr += Visit(operation[i]);
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if (do_cast) {
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expr += ')';
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if (is_array) {
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ASSERT(!is_extra);
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operand = "float(ftoi(" + operand + "))";
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}
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expr += operand;
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if (i + 1 == meta.coords_count) {
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expr += ')';
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}
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@ -1065,7 +1069,14 @@ private:
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}
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std::string F4TextureGather(Operation operation) {
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return GenerateTexture(operation, "textureGather", "int");
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const bool is_shadow = std::get<MetaTexture>(operation.GetMeta()).sampler.IsShadow();
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if (is_shadow) {
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return GenerateTexture(operation, "textureGather",
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[](std::string ref_z) { return ref_z; });
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} else {
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return GenerateTexture(operation, "textureGather",
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[](std::string comp) { return "ftoi(" + comp + ')'; });
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}
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}
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std::string F4TextureQueryDimensions(Operation operation) {
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@ -265,6 +265,7 @@ struct MetaHalfArithmetic {
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struct MetaTexture {
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const Sampler& sampler;
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u32 coords_count{};
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std::optional<u32> array_index;
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};
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struct MetaComponents {
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@ -696,7 +697,8 @@ private:
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Node GetTextureCode(Tegra::Shader::Instruction instr, Tegra::Shader::TextureType texture_type,
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Tegra::Shader::TextureProcessMode process_mode, bool depth_compare,
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bool is_array, std::size_t bias_offset, std::vector<Node>&& coords);
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bool is_array, std::size_t array_offset, std::size_t bias_offset,
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std::vector<Node>&& coords);
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void WriteLogicOperation(BasicBlock& bb, Tegra::Shader::Register dest,
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Tegra::Shader::LogicOperation logic_op, Node op_a, Node op_b,
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