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synced 2024-08-21 15:23:23 +02:00
core: arm: Remove unnecessary JIT checks.
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091e9e8c41
commit
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@ -251,16 +251,10 @@ void ARM_Dynarmic_32::SetTPIDR_EL0(u64 value) {
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}
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void ARM_Dynarmic_32::ChangeProcessorID(std::size_t new_core_id) {
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if (!jit) {
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return;
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}
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jit->ChangeProcessorID(new_core_id);
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}
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void ARM_Dynarmic_32::SaveContext(ThreadContext32& ctx) {
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if (!jit) {
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return;
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}
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Dynarmic::A32::Context context;
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jit->SaveContext(context);
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ctx.cpu_registers = context.Regs();
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@ -270,9 +264,6 @@ void ARM_Dynarmic_32::SaveContext(ThreadContext32& ctx) {
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}
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void ARM_Dynarmic_32::LoadContext(const ThreadContext32& ctx) {
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if (!jit) {
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return;
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}
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Dynarmic::A32::Context context;
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context.Regs() = ctx.cpu_registers;
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context.ExtRegs() = ctx.extension_registers;
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@ -282,9 +273,6 @@ void ARM_Dynarmic_32::LoadContext(const ThreadContext32& ctx) {
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}
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void ARM_Dynarmic_32::PrepareReschedule() {
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if (!jit) {
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return;
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}
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jit->HaltExecution();
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}
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@ -290,16 +290,10 @@ void ARM_Dynarmic_64::SetTPIDR_EL0(u64 value) {
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}
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void ARM_Dynarmic_64::ChangeProcessorID(std::size_t new_core_id) {
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if (!jit) {
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return;
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}
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jit->ChangeProcessorID(new_core_id);
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}
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void ARM_Dynarmic_64::SaveContext(ThreadContext64& ctx) {
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if (!jit) {
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return;
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}
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ctx.cpu_registers = jit->GetRegisters();
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ctx.sp = jit->GetSP();
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ctx.pc = jit->GetPC();
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@ -311,9 +305,6 @@ void ARM_Dynarmic_64::SaveContext(ThreadContext64& ctx) {
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}
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void ARM_Dynarmic_64::LoadContext(const ThreadContext64& ctx) {
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if (!jit) {
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return;
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}
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jit->SetRegisters(ctx.cpu_registers);
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jit->SetSP(ctx.sp);
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jit->SetPC(ctx.pc);
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@ -325,9 +316,6 @@ void ARM_Dynarmic_64::LoadContext(const ThreadContext64& ctx) {
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}
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void ARM_Dynarmic_64::PrepareReschedule() {
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if (!jit) {
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return;
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}
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jit->HaltExecution();
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}
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