mirror of
https://github.com/yuzu-emu/yuzu.git
synced 2024-08-21 17:33:23 +02:00
shader_decode: Implement ISET
This commit is contained in:
parent
acdbbb8885
commit
078ba28e13
@ -16,7 +16,33 @@ u32 ShaderIR::DecodeIntegerSet(BasicBlock& bb, u32 pc) {
|
||||
const Instruction instr = {program_code[pc]};
|
||||
const auto opcode = OpCode::Decode(instr);
|
||||
|
||||
UNIMPLEMENTED();
|
||||
const Node op_a = GetRegister(instr.gpr8);
|
||||
const Node op_b = [&]() {
|
||||
if (instr.is_b_imm) {
|
||||
return Immediate(instr.alu.GetSignedImm20_20());
|
||||
} else if (instr.is_b_gpr) {
|
||||
return GetRegister(instr.gpr20);
|
||||
} else {
|
||||
return GetConstBuffer(instr.cbuf34.index, instr.cbuf34.offset);
|
||||
}
|
||||
}();
|
||||
|
||||
// The iset instruction sets a register to 1.0 or -1 (depending on the bf bit) if the condition
|
||||
// is true, and to 0 otherwise.
|
||||
const Node second_pred = GetPredicate(instr.iset.pred39, instr.iset.neg_pred != 0);
|
||||
const Node first_pred =
|
||||
GetPredicateComparisonInteger(instr.iset.cond, instr.iset.is_signed, op_a, op_b);
|
||||
|
||||
const OperationCode combiner = GetPredicateCombiner(instr.iset.op);
|
||||
|
||||
const Node predicate = Operation(combiner, first_pred, second_pred);
|
||||
|
||||
const Node true_value = instr.iset.bf ? Immediate(1.0f) : Immediate(-1);
|
||||
const Node false_value = instr.iset.bf ? Immediate(0.0f) : Immediate(0);
|
||||
const Node value =
|
||||
Operation(OperationCode::Select, PRECISE, predicate, true_value, false_value);
|
||||
|
||||
SetRegister(bb, instr.gpr0, value);
|
||||
|
||||
return pc;
|
||||
}
|
||||
|
Loading…
Reference in New Issue
Block a user