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memory: Port Atmosphere's DmntCheatVm
This was done because the current VM contained many inaccuracies and this also allows cheats to have identical behavior between hardware and yuzu.
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58
src/core/memory/dmnt_cheat_types.h
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58
src/core/memory/dmnt_cheat_types.h
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/*
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* Copyright (c) 2018-2019 Atmosphère-NX
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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/*
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* Adapted by DarkLordZach for use/interaction with yuzu
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*
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* Modifications Copyright 2019 yuzu emulator team
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* Licensed under GPLv2 or any later version
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* Refer to the license.txt file included.
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*/
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#pragma once
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#include "common/common_types.h"
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namespace Memory {
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struct MemoryRegionExtents {
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u64 base;
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u64 size;
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};
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struct CheatProcessMetadata {
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u64 process_id;
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u64 title_id;
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MemoryRegionExtents main_nso_extents;
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MemoryRegionExtents heap_extents;
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MemoryRegionExtents alias_extents;
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MemoryRegionExtents address_space_extents;
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std::array<u8, 0x20> main_nso_build_id;
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};
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struct CheatDefinition {
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std::array<char, 0x40> readable_name;
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u32 num_opcodes;
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std::array<u32, 0x100> opcodes;
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};
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struct CheatEntry {
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bool enabled;
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u32 cheat_id;
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CheatDefinition definition;
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};
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} // namespace Memory
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1206
src/core/memory/dmnt_cheat_vm.cpp
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1206
src/core/memory/dmnt_cheat_vm.cpp
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File diff suppressed because it is too large
Load Diff
334
src/core/memory/dmnt_cheat_vm.h
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334
src/core/memory/dmnt_cheat_vm.h
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/*
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* Copyright (c) 2018-2019 Atmosphère-NX
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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/*
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* Adapted by DarkLordZach for use/interaction with yuzu
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*
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* Modifications Copyright 2019 yuzu emulator team
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* Licensed under GPLv2 or any later version
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* Refer to the license.txt file included.
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*/
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#pragma once
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#include <vector>
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#include <fmt/printf.h>
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#include "common/common_types.h"
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#include "core/memory/dmnt_cheat_types.h"
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namespace Memory {
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enum CheatVmOpcodeType : u32 {
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CheatVmOpcodeType_StoreStatic = 0,
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CheatVmOpcodeType_BeginConditionalBlock = 1,
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CheatVmOpcodeType_EndConditionalBlock = 2,
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CheatVmOpcodeType_ControlLoop = 3,
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CheatVmOpcodeType_LoadRegisterStatic = 4,
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CheatVmOpcodeType_LoadRegisterMemory = 5,
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CheatVmOpcodeType_StoreStaticToAddress = 6,
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CheatVmOpcodeType_PerformArithmeticStatic = 7,
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CheatVmOpcodeType_BeginKeypressConditionalBlock = 8,
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/* These are not implemented by Gateway's VM. */
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CheatVmOpcodeType_PerformArithmeticRegister = 9,
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CheatVmOpcodeType_StoreRegisterToAddress = 10,
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CheatVmOpcodeType_Reserved11 = 11,
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/* This is a meta entry, and not a real opcode. */
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/* This is to facilitate multi-nybble instruction decoding. */
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CheatVmOpcodeType_ExtendedWidth = 12,
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/* Extended width opcodes. */
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CheatVmOpcodeType_BeginRegisterConditionalBlock = 0xC0,
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CheatVmOpcodeType_SaveRestoreRegister = 0xC1,
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CheatVmOpcodeType_SaveRestoreRegisterMask = 0xC2,
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/* This is a meta entry, and not a real opcode. */
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/* This is to facilitate multi-nybble instruction decoding. */
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CheatVmOpcodeType_DoubleExtendedWidth = 0xF0,
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/* Double-extended width opcodes. */
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CheatVmOpcodeType_DebugLog = 0xFFF,
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};
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enum MemoryAccessType : u32 {
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MemoryAccessType_MainNso = 0,
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MemoryAccessType_Heap = 1,
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};
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enum ConditionalComparisonType : u32 {
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ConditionalComparisonType_GT = 1,
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ConditionalComparisonType_GE = 2,
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ConditionalComparisonType_LT = 3,
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ConditionalComparisonType_LE = 4,
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ConditionalComparisonType_EQ = 5,
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ConditionalComparisonType_NE = 6,
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};
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enum RegisterArithmeticType : u32 {
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RegisterArithmeticType_Addition = 0,
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RegisterArithmeticType_Subtraction = 1,
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RegisterArithmeticType_Multiplication = 2,
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RegisterArithmeticType_LeftShift = 3,
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RegisterArithmeticType_RightShift = 4,
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/* These are not supported by Gateway's VM. */
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RegisterArithmeticType_LogicalAnd = 5,
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RegisterArithmeticType_LogicalOr = 6,
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RegisterArithmeticType_LogicalNot = 7,
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RegisterArithmeticType_LogicalXor = 8,
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RegisterArithmeticType_None = 9,
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};
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enum StoreRegisterOffsetType : u32 {
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StoreRegisterOffsetType_None = 0,
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StoreRegisterOffsetType_Reg = 1,
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StoreRegisterOffsetType_Imm = 2,
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StoreRegisterOffsetType_MemReg = 3,
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StoreRegisterOffsetType_MemImm = 4,
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StoreRegisterOffsetType_MemImmReg = 5,
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};
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enum CompareRegisterValueType : u32 {
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CompareRegisterValueType_MemoryRelAddr = 0,
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CompareRegisterValueType_MemoryOfsReg = 1,
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CompareRegisterValueType_RegisterRelAddr = 2,
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CompareRegisterValueType_RegisterOfsReg = 3,
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CompareRegisterValueType_StaticValue = 4,
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CompareRegisterValueType_OtherRegister = 5,
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};
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enum SaveRestoreRegisterOpType : u32 {
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SaveRestoreRegisterOpType_Restore = 0,
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SaveRestoreRegisterOpType_Save = 1,
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SaveRestoreRegisterOpType_ClearSaved = 2,
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SaveRestoreRegisterOpType_ClearRegs = 3,
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};
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enum DebugLogValueType : u32 {
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DebugLogValueType_MemoryRelAddr = 0,
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DebugLogValueType_MemoryOfsReg = 1,
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DebugLogValueType_RegisterRelAddr = 2,
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DebugLogValueType_RegisterOfsReg = 3,
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DebugLogValueType_RegisterValue = 4,
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};
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union VmInt {
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u8 bit8;
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u16 bit16;
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u32 bit32;
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u64 bit64;
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};
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struct StoreStaticOpcode {
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u32 bit_width;
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MemoryAccessType mem_type;
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u32 offset_register;
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u64 rel_address;
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VmInt value;
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};
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struct BeginConditionalOpcode {
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u32 bit_width;
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MemoryAccessType mem_type;
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ConditionalComparisonType cond_type;
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u64 rel_address;
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VmInt value;
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};
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struct EndConditionalOpcode {};
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struct ControlLoopOpcode {
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bool start_loop;
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u32 reg_index;
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u32 num_iters;
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};
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struct LoadRegisterStaticOpcode {
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u32 reg_index;
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u64 value;
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};
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struct LoadRegisterMemoryOpcode {
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u32 bit_width;
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MemoryAccessType mem_type;
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u32 reg_index;
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bool load_from_reg;
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u64 rel_address;
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};
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struct StoreStaticToAddressOpcode {
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u32 bit_width;
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u32 reg_index;
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bool increment_reg;
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bool add_offset_reg;
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u32 offset_reg_index;
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u64 value;
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};
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struct PerformArithmeticStaticOpcode {
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u32 bit_width;
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u32 reg_index;
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RegisterArithmeticType math_type;
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u32 value;
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};
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struct BeginKeypressConditionalOpcode {
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u32 key_mask;
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};
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struct PerformArithmeticRegisterOpcode {
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u32 bit_width;
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RegisterArithmeticType math_type;
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u32 dst_reg_index;
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u32 src_reg_1_index;
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u32 src_reg_2_index;
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bool has_immediate;
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VmInt value;
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};
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struct StoreRegisterToAddressOpcode {
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u32 bit_width;
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u32 str_reg_index;
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u32 addr_reg_index;
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bool increment_reg;
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StoreRegisterOffsetType ofs_type;
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MemoryAccessType mem_type;
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u32 ofs_reg_index;
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u64 rel_address;
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};
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struct BeginRegisterConditionalOpcode {
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u32 bit_width;
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ConditionalComparisonType cond_type;
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u32 val_reg_index;
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CompareRegisterValueType comp_type;
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MemoryAccessType mem_type;
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u32 addr_reg_index;
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u32 other_reg_index;
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u32 ofs_reg_index;
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u64 rel_address;
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VmInt value;
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};
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struct SaveRestoreRegisterOpcode {
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u32 dst_index;
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u32 src_index;
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SaveRestoreRegisterOpType op_type;
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};
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struct SaveRestoreRegisterMaskOpcode {
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SaveRestoreRegisterOpType op_type;
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std::array<bool, 0x10> should_operate;
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};
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struct DebugLogOpcode {
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u32 bit_width;
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u32 log_id;
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DebugLogValueType val_type;
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MemoryAccessType mem_type;
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u32 addr_reg_index;
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u32 val_reg_index;
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u32 ofs_reg_index;
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u64 rel_address;
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};
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struct CheatVmOpcode {
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CheatVmOpcodeType opcode;
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bool begin_conditional_block;
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union {
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StoreStaticOpcode store_static;
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BeginConditionalOpcode begin_cond;
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EndConditionalOpcode end_cond;
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ControlLoopOpcode ctrl_loop;
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LoadRegisterStaticOpcode ldr_static;
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LoadRegisterMemoryOpcode ldr_memory;
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StoreStaticToAddressOpcode str_static;
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PerformArithmeticStaticOpcode perform_math_static;
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BeginKeypressConditionalOpcode begin_keypress_cond;
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PerformArithmeticRegisterOpcode perform_math_reg;
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StoreRegisterToAddressOpcode str_register;
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BeginRegisterConditionalOpcode begin_reg_cond;
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SaveRestoreRegisterOpcode save_restore_reg;
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SaveRestoreRegisterMaskOpcode save_restore_regmask;
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DebugLogOpcode debug_log;
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};
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};
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class DmntCheatVm {
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public:
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/// Helper Type for DmntCheatVm <=> yuzu Interface
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class Callbacks {
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public:
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virtual ~Callbacks();
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virtual void MemoryRead(VAddr address, void* data, u64 size) = 0;
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virtual void MemoryWrite(VAddr address, const void* data, u64 size) = 0;
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virtual u64 HidKeysDown() = 0;
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virtual void DebugLog(u8 id, u64 value) = 0;
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virtual void CommandLog(std::string_view data) = 0;
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};
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constexpr static size_t MaximumProgramOpcodeCount = 0x400;
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constexpr static size_t NumRegisters = 0x10;
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private:
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std::unique_ptr<Callbacks> callbacks;
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size_t num_opcodes = 0;
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size_t instruction_ptr = 0;
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size_t condition_depth = 0;
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bool decode_success = false;
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std::array<u32, MaximumProgramOpcodeCount> program{};
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std::array<u64, NumRegisters> registers{};
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std::array<u64, NumRegisters> saved_values{};
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std::array<size_t, NumRegisters> loop_tops{};
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private:
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bool DecodeNextOpcode(CheatVmOpcode& out);
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void SkipConditionalBlock();
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void ResetState();
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/* For implementing the DebugLog opcode. */
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void DebugLog(u32 log_id, u64 value);
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/* For debugging. These will be IFDEF'd out normally. */
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template <typename... Args>
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void LogToDebugFile(const char* format, const Args&... args) {
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callbacks->CommandLog(fmt::sprintf(format, args...));
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}
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void LogOpcode(const CheatVmOpcode& opcode);
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static u64 GetVmInt(VmInt value, u32 bit_width);
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static u64 GetCheatProcessAddress(const CheatProcessMetadata& metadata,
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MemoryAccessType mem_type, u64 rel_address);
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public:
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DmntCheatVm(std::unique_ptr<Callbacks> callbacks) : callbacks(std::move(callbacks)) {}
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size_t GetProgramSize() {
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return this->num_opcodes;
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}
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bool LoadProgram(const std::vector<CheatEntry>& cheats);
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void Execute(const CheatProcessMetadata& metadata);
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};
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}; // namespace Memory
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