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shader_bytecode: Implement other TEXS masks.
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@ -425,6 +425,7 @@ union Instruction {
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union {
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BitField<50, 3, u64> component_mask_selector;
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BitField<0, 8, Register> gpr0;
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BitField<28, 8, Register> gpr28;
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bool HasTwoDestinations() const {
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@ -432,13 +433,16 @@ union Instruction {
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}
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bool IsComponentEnabled(size_t component) const {
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static constexpr std::array<size_t, 5> one_dest_mask{0x1, 0x2, 0x4, 0x8, 0x3};
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static constexpr std::array<size_t, 5> two_dest_mask{0x7, 0xb, 0xd, 0xe, 0xf};
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const auto& mask{HasTwoDestinations() ? two_dest_mask : one_dest_mask};
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static constexpr std::array<std::array<u32, 8>, 4> mask_lut{
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{{},
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{0x1, 0x2, 0x4, 0x8, 0x3},
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{0x1, 0x2, 0x4, 0x8, 0x3, 0x9, 0xa, 0xc},
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{0x7, 0xb, 0xd, 0xe, 0xf}}};
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ASSERT(component_mask_selector < mask.size());
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size_t index{gpr0.Value() != Register::ZeroIndex ? 1U : 0U};
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index |= gpr28.Value() != Register::ZeroIndex ? 2 : 0;
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return ((1ull << component) & mask[component_mask_selector]) != 0;
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return ((1ull << component) & mask_lut[index][component_mask_selector]) != 0;
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}
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} texs;
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