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video_core: Adjust topology update logic
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41461514d6
commit
15d63c3d3d
@ -46,9 +46,6 @@ void DrawManager::ProcessMethodCall(u32 method, u32 argument) {
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SetInlineIndexBuffer(regs.inline_index_4x8.index2);
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SetInlineIndexBuffer(regs.inline_index_4x8.index2);
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SetInlineIndexBuffer(regs.inline_index_4x8.index3);
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SetInlineIndexBuffer(regs.inline_index_4x8.index3);
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break;
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break;
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case MAXWELL3D_REG_INDEX(topology_override):
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use_topology_override = true;
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break;
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default:
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default:
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break;
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break;
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}
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}
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@ -156,25 +153,28 @@ void DrawManager::DrawIndexSmall(u32 argument) {
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ProcessDraw(true, 1);
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ProcessDraw(true, 1);
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}
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}
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void DrawManager::ProcessTopologyOverride() {
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void DrawManager::UpdateTopology() {
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if (!use_topology_override)
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return;
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const auto& regs{maxwell3d->regs};
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const auto& regs{maxwell3d->regs};
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switch (regs.topology_override) {
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switch (regs.primitive_topology_control) {
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case PrimitiveTopologyOverride::None:
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case PrimitiveTopologyControl::UseInBeginMethods:
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break;
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break;
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case PrimitiveTopologyOverride::Points:
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case PrimitiveTopologyControl::UseSeparateState:
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draw_state.topology = PrimitiveTopology::Points;
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switch (regs.topology_override) {
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break;
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case PrimitiveTopologyOverride::None:
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case PrimitiveTopologyOverride::Lines:
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break;
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draw_state.topology = PrimitiveTopology::Lines;
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case PrimitiveTopologyOverride::Points:
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break;
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draw_state.topology = PrimitiveTopology::Points;
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case PrimitiveTopologyOverride::LineStrip:
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break;
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draw_state.topology = PrimitiveTopology::LineStrip;
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case PrimitiveTopologyOverride::Lines:
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break;
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draw_state.topology = PrimitiveTopology::Lines;
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default:
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break;
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draw_state.topology = static_cast<PrimitiveTopology>(regs.topology_override);
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case PrimitiveTopologyOverride::LineStrip:
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draw_state.topology = PrimitiveTopology::LineStrip;
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break;
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default:
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draw_state.topology = static_cast<PrimitiveTopology>(regs.topology_override);
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break;
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}
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break;
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break;
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}
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}
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}
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}
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@ -183,7 +183,7 @@ void DrawManager::ProcessDraw(bool draw_indexed, u32 instance_count) {
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LOG_TRACE(HW_GPU, "called, topology={}, count={}", draw_state.topology.Value(),
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LOG_TRACE(HW_GPU, "called, topology={}, count={}", draw_state.topology.Value(),
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draw_indexed ? draw_state.index_buffer.count : draw_state.vertex_buffer.count);
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draw_indexed ? draw_state.index_buffer.count : draw_state.vertex_buffer.count);
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ProcessTopologyOverride();
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UpdateTopology();
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if (maxwell3d->ShouldExecute())
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if (maxwell3d->ShouldExecute())
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maxwell3d->rasterizer->Draw(draw_indexed, instance_count);
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maxwell3d->rasterizer->Draw(draw_indexed, instance_count);
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@ -10,6 +10,7 @@ class RasterizerInterface;
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}
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}
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namespace Tegra::Engines {
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namespace Tegra::Engines {
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using PrimitiveTopologyControl = Maxwell3D::Regs::PrimitiveTopologyControl;
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using PrimitiveTopology = Maxwell3D::Regs::PrimitiveTopology;
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using PrimitiveTopology = Maxwell3D::Regs::PrimitiveTopology;
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using PrimitiveTopologyOverride = Maxwell3D::Regs::PrimitiveTopologyOverride;
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using PrimitiveTopologyOverride = Maxwell3D::Regs::PrimitiveTopologyOverride;
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using IndexBuffer = Maxwell3D::Regs::IndexBuffer;
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using IndexBuffer = Maxwell3D::Regs::IndexBuffer;
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@ -58,12 +59,11 @@ private:
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void DrawIndexSmall(u32 argument);
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void DrawIndexSmall(u32 argument);
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void ProcessTopologyOverride();
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void UpdateTopology();
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void ProcessDraw(bool draw_indexed, u32 instance_count);
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void ProcessDraw(bool draw_indexed, u32 instance_count);
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Maxwell3D* maxwell3d{};
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Maxwell3D* maxwell3d{};
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State draw_state{};
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State draw_state{};
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bool use_topology_override{};
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};
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};
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} // namespace Tegra::Engines
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} // namespace Tegra::Engines
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