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Merge pull request #3210 from ReinUsesLisp/memory-barrier
shader: Implement MEMBAR.GL
This commit is contained in:
commit
1a66cde175
2
externals/sirit
vendored
2
externals/sirit
vendored
@ -1 +1 @@
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Subproject commit e1a6729df7f11e33f6dc0939b18995a57c8bf3d8
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Subproject commit 12f40a80324d7c154f19f25c448a5ce27d38cd18
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@ -384,6 +384,15 @@ enum class IsberdMode : u64 {
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enum class IsberdShift : u64 { None = 0, U16 = 1, B32 = 2 };
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enum class MembarType : u64 {
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CTA = 0,
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GL = 1,
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SYS = 2,
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VC = 3,
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};
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enum class MembarUnknown : u64 { Default = 0, IVALLD = 1, IVALLT = 2, IVALLTD = 3 };
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enum class HalfType : u64 {
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H0_H1 = 0,
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F32 = 1,
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@ -1545,6 +1554,11 @@ union Instruction {
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BitField<47, 2, IsberdShift> shift;
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} isberd;
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union {
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BitField<8, 2, MembarType> type;
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BitField<0, 2, MembarUnknown> unknown;
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} membar;
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union {
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BitField<48, 1, u64> signed_a;
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BitField<38, 1, u64> is_byte_chunk_a;
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@ -1669,6 +1683,7 @@ public:
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IPA,
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OUT_R, // Emit vertex/primitive
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ISBERD,
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MEMBAR,
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VMAD,
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VSETP,
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FFMA_IMM, // Fused Multiply and Add
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@ -1930,7 +1945,7 @@ private:
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INST("111000100100----", Id::BRA, Type::Flow, "BRA"),
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INST("111000100101----", Id::BRX, Type::Flow, "BRX"),
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INST("1111000011111---", Id::SYNC, Type::Flow, "SYNC"),
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INST("111000110100---", Id::BRK, Type::Flow, "BRK"),
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INST("111000110100----", Id::BRK, Type::Flow, "BRK"),
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INST("111000110000----", Id::EXIT, Type::Flow, "EXIT"),
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INST("1111000011110---", Id::DEPBAR, Type::Synch, "DEPBAR"),
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INST("0101000011011---", Id::VOTE, Type::Warp, "VOTE"),
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@ -1969,6 +1984,7 @@ private:
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INST("11100000--------", Id::IPA, Type::Trivial, "IPA"),
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INST("1111101111100---", Id::OUT_R, Type::Trivial, "OUT_R"),
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INST("1110111111010---", Id::ISBERD, Type::Trivial, "ISBERD"),
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INST("1110111110011---", Id::MEMBAR, Type::Trivial, "MEMBAR"),
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INST("01011111--------", Id::VMAD, Type::Video, "VMAD"),
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INST("0101000011110---", Id::VSETP, Type::Video, "VSETP"),
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INST("0011001-1-------", Id::FFMA_IMM, Type::Ffma, "FFMA_IMM"),
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@ -1992,6 +1992,11 @@ private:
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return {fmt::format("readInvocationARB({}, {})", value, index), Type::Float};
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}
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Expression MemoryBarrierGL(Operation) {
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code.AddLine("memoryBarrier();");
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return {};
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}
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struct Func final {
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Func() = delete;
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~Func() = delete;
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@ -2173,6 +2178,8 @@ private:
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&GLSLDecompiler::ThreadId,
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&GLSLDecompiler::ShuffleIndexed,
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&GLSLDecompiler::MemoryBarrierGL,
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};
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static_assert(operation_decompilers.size() == static_cast<std::size_t>(OperationCode::Amount));
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@ -1971,6 +1971,18 @@ private:
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return {OpSubgroupReadInvocationKHR(t_float, value, index), Type::Float};
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}
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Expression MemoryBarrierGL(Operation) {
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const auto scope = spv::Scope::Device;
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const auto semantics =
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spv::MemorySemanticsMask::AcquireRelease | spv::MemorySemanticsMask::UniformMemory |
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spv::MemorySemanticsMask::WorkgroupMemory |
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spv::MemorySemanticsMask::AtomicCounterMemory | spv::MemorySemanticsMask::ImageMemory;
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OpMemoryBarrier(Constant(t_uint, static_cast<u32>(scope)),
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Constant(t_uint, static_cast<u32>(semantics)));
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return {};
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}
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Id DeclareBuiltIn(spv::BuiltIn builtin, spv::StorageClass storage, Id type, std::string name) {
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const Id id = OpVariable(type, storage);
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Decorate(id, spv::Decoration::BuiltIn, static_cast<u32>(builtin));
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@ -2374,6 +2386,8 @@ private:
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&SPIRVDecompiler::ThreadId,
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&SPIRVDecompiler::ShuffleIndexed,
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&SPIRVDecompiler::MemoryBarrierGL,
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};
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static_assert(operation_decompilers.size() == static_cast<std::size_t>(OperationCode::Amount));
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@ -257,6 +257,12 @@ u32 ShaderIR::DecodeOther(NodeBlock& bb, u32 pc) {
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SetRegister(bb, instr.gpr0, GetRegister(instr.gpr8));
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break;
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}
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case OpCode::Id::MEMBAR: {
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UNIMPLEMENTED_IF(instr.membar.type != Tegra::Shader::MembarType::GL);
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UNIMPLEMENTED_IF(instr.membar.unknown != Tegra::Shader::MembarUnknown::Default);
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bb.push_back(Operation(OperationCode::MemoryBarrierGL));
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break;
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}
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case OpCode::Id::DEPBAR: {
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LOG_DEBUG(HW_GPU, "DEPBAR instruction is stubbed");
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break;
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@ -189,6 +189,8 @@ enum class OperationCode {
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ThreadId, /// () -> uint
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ShuffleIndexed, /// (uint value, uint index) -> uint
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MemoryBarrierGL, /// () -> void
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Amount,
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};
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