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gl_shader_decompiler: Implement TEXS component mask.
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@ -270,8 +270,22 @@ union Instruction {
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} tex;
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union {
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// TODO(bunnei): This is just a guess, needs to be verified
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BitField<52, 1, u64> enable_g_component;
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BitField<50, 3, u64> component_mask_selector;
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BitField<28, 8, Register> gpr28;
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bool HasTwoDestinations() const {
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return gpr28.Value() != Register::ZeroIndex;
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}
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bool IsComponentEnabled(size_t component) const {
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static constexpr std::array<size_t, 5> one_dest_mask{0x1, 0x2, 0x4, 0x8, 0x3};
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static constexpr std::array<size_t, 5> two_dest_mask{0x7, 0xb, 0xd, 0xe, 0xf};
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const auto& mask{HasTwoDestinations() ? two_dest_mask : one_dest_mask};
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ASSERT(component_mask_selector < mask.size());
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return ((1 << component) & mask[component_mask_selector]) != 0;
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}
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} texs;
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BitField<61, 1, u64> is_b_imm;
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@ -938,18 +938,21 @@ private:
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// TEXS has two destination registers. RG goes into gpr0+0 and gpr0+1, and BA goes
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// into gpr28+0 and gpr28+1
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size_t offset{};
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for (const auto& dest : {instr.gpr0.Value(), instr.gpr28.Value()}) {
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for (unsigned elem = 0; elem < 2; ++elem) {
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if (dest + elem >= Register::ZeroIndex) {
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// Skip invalid register values
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break;
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if (!instr.texs.IsComponentEnabled(elem)) {
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// Skip disabled components
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continue;
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}
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regs.SetRegisterToFloat(dest, elem + offset, texture, 1, 4, false, elem);
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if (!instr.texs.enable_g_component) {
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// Skip the second component
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break;
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}
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}
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if (!instr.texs.HasTwoDestinations()) {
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// Skip the second destination
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break;
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}
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offset += 2;
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}
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--shader.scope;
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