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shader_decode: Implement ISCADD
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@ -41,6 +41,21 @@ u32 ShaderIR::DecodeArithmeticInteger(BasicBlock& bb, u32 pc) {
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SetRegister(bb, instr.gpr0, Operation(OperationCode::IAdd, PRECISE, op_a, op_b));
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break;
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}
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case OpCode::Id::ISCADD_C:
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case OpCode::Id::ISCADD_R:
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case OpCode::Id::ISCADD_IMM: {
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UNIMPLEMENTED_IF_MSG(instr.generates_cc,
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"Condition codes generation in ISCADD is not implemented");
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op_a = GetOperandAbsNegInteger(op_a, false, instr.alu_integer.negate_a, true);
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op_b = GetOperandAbsNegInteger(op_b, false, instr.alu_integer.negate_b, true);
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const Node shift = Immediate(static_cast<u32>(instr.alu_integer.shift_amount));
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const Node shifted_a = Operation(OperationCode::ILogicalShiftLeft, NO_PRECISE, op_a, shift);
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const Node value = Operation(OperationCode::IAdd, NO_PRECISE, shifted_a, op_b);
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SetRegister(bb, instr.gpr0, value);
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break;
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}
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case OpCode::Id::SEL_C:
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case OpCode::Id::SEL_R:
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case OpCode::Id::SEL_IMM: {
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