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Merge pull request #249 from Subv/macro_E1A
GPU: Implement macro 0xE1A BindTextureInfoBuffer in HLE.
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commit
2332a44b68
@ -12,6 +12,7 @@ namespace Engines {
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constexpr u32 MacroRegistersStart = 0xE00;
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const std::unordered_map<u32, Maxwell3D::MethodInfo> Maxwell3D::method_handlers = {
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{0xE1A, {"BindTextureInfoBuffer", 1, &Maxwell3D::BindTextureInfoBuffer}},
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{0xE24, {"SetShader", 5, &Maxwell3D::SetShader}},
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{0xE2A, {"BindStorageBuffer", 1, &Maxwell3D::BindStorageBuffer}},
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};
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@ -160,6 +161,23 @@ void Maxwell3D::DrawArrays() {
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LOG_WARNING(HW_GPU, "Game requested a DrawArrays, ignoring");
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}
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void Maxwell3D::BindTextureInfoBuffer(const std::vector<u32>& parameters) {
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/**
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* Parameters description:
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* [0] = Shader stage, usually 4 for FragmentShader
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*/
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u32 stage = parameters[0];
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// Perform the same operations as the real macro code.
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GPUVAddr address = static_cast<GPUVAddr>(regs.tex_info_buffers.address[stage]) << 8;
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u32 size = regs.tex_info_buffers.size[stage];
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regs.const_buffer.cb_size = size;
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regs.const_buffer.cb_address_high = address >> 32;
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regs.const_buffer.cb_address_low = address & 0xFFFFFFFF;
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}
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void Maxwell3D::SetShader(const std::vector<u32>& parameters) {
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/**
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* Parameters description:
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@ -178,7 +178,14 @@ public:
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}
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} ssbo_info;
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INSERT_PADDING_WORDS(0x11D);
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INSERT_PADDING_WORDS(0x11);
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struct {
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u32 address[MaxShaderStage];
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u32 size[MaxShaderStage];
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} tex_info_buffers;
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INSERT_PADDING_WORDS(0x102);
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};
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std::array<u32, NUM_REGS> reg_array;
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};
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@ -240,6 +247,7 @@ private:
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void DrawArrays();
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/// Method call handlers
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void BindTextureInfoBuffer(const std::vector<u32>& parameters);
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void SetShader(const std::vector<u32>& parameters);
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void BindStorageBuffer(const std::vector<u32>& parameters);
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@ -266,6 +274,8 @@ ASSERT_REG_POSITION(const_buffer, 0x8E0);
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ASSERT_REG_POSITION(cb_bind[0], 0x904);
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ASSERT_REG_POSITION(tex_cb_index, 0x982);
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ASSERT_REG_POSITION(ssbo_info, 0xD18);
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ASSERT_REG_POSITION(tex_info_buffers.address[0], 0xD2A);
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ASSERT_REG_POSITION(tex_info_buffers.size[0], 0xD2F);
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#undef ASSERT_REG_POSITION
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