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shader: Fix floating point comparison for FP16
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e10d9c1b8e
commit
27fb97377e
@ -72,7 +72,7 @@ bool IsCompareOpOrdered(FPCompareOp op) {
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}
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}
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IR::U1 FloatingPointCompare(IR::IREmitter& ir, const IR::F32& operand_1, const IR::F32& operand_2,
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IR::U1 FloatingPointCompare(IR::IREmitter& ir, const IR::F16F32F64& operand_1, const IR::F16F32F64& operand_2,
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FPCompareOp compare_op, IR::FpControl control) {
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const bool ordered{IsCompareOpOrdered(compare_op)};
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switch (compare_op) {
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@ -18,7 +18,7 @@ namespace Shader::Maxwell {
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[[nodiscard]] bool IsCompareOpOrdered(FPCompareOp op);
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[[nodiscard]] IR::U1 FloatingPointCompare(IR::IREmitter& ir, const IR::F32& operand_1,
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const IR::F32& operand_2, FPCompareOp compare_op,
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[[nodiscard]] IR::U1 FloatingPointCompare(IR::IREmitter& ir, const IR::F16F32F64& operand_1,
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const IR::F16F32F64& operand_2, FPCompareOp compare_op,
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IR::FpControl control = {});
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} // namespace Shader::Maxwell
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@ -22,8 +22,8 @@ void HSET2(TranslatorVisitor& v, u64 insn, const IR::U32& src_b, bool bf, bool f
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auto [lhs_a, rhs_a]{Extract(v.ir, v.X(hset2.src_a_reg), hset2.swizzle_a)};
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auto [lhs_b, rhs_b]{Extract(v.ir, src_b, swizzle_b)};
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// TODO: Implement FP16 FloatingPointCompare
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//if (lhs_a.Type() != lhs_b.Type()) {
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if (lhs_a.Type() != lhs_b.Type()) {
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if (lhs_a.Type() == IR::Type::F16) {
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lhs_a = v.ir.FPConvert(32, lhs_a);
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rhs_a = v.ir.FPConvert(32, rhs_a);
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@ -32,7 +32,7 @@ void HSET2(TranslatorVisitor& v, u64 insn, const IR::U32& src_b, bool bf, bool f
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lhs_b = v.ir.FPConvert(32, lhs_b);
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rhs_b = v.ir.FPConvert(32, rhs_b);
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}
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//}
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}
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lhs_a = v.ir.FPAbsNeg(lhs_a, hset2.abs_a != 0, hset2.neg_a != 0);
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rhs_a = v.ir.FPAbsNeg(rhs_a, hset2.abs_a != 0, hset2.neg_a != 0);
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@ -94,22 +94,22 @@ void TranslatorVisitor::HSET2_cbuf(u64 insn) {
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}
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void TranslatorVisitor::HSET2_imm(u64 insn) {
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union {
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u64 insn;
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BitField<53, 1, u64> bf;
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BitField<54, 1, u64> ftz;
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BitField<49, 4, FPCompareOp> compare_op;
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BitField<56, 1, u64> neg_high;
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BitField<30, 9, u64> high;
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BitField<29, 1, u64> neg_low;
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BitField<20, 9, u64> low;
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} const hset2{insn};
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union {
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u64 insn;
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BitField<53, 1, u64> bf;
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BitField<54, 1, u64> ftz;
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BitField<49, 4, FPCompareOp> compare_op;
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BitField<56, 1, u64> neg_high;
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BitField<30, 9, u64> high;
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BitField<29, 1, u64> neg_low;
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BitField<20, 9, u64> low;
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} const hset2{insn};
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const u32 imm{static_cast<u32>(hset2.low << 6) | ((hset2.neg_low != 0 ? 1 : 0) << 15) |
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static_cast<u32>(hset2.high << 22) | ((hset2.neg_high != 0 ? 1 : 0) << 31)};
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const u32 imm{static_cast<u32>(hset2.low << 6) | ((hset2.neg_low != 0 ? 1 : 0) << 15) |
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static_cast<u32>(hset2.high << 22) | ((hset2.neg_high != 0 ? 1 : 0) << 31)};
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HSET2(*this, insn, ir.Imm32(imm), hset2.bf != 0, hset2.ftz != 0, false, false,
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hset2.compare_op, Swizzle::H1_H0);
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HSET2(*this, insn, ir.Imm32(imm), hset2.bf != 0, hset2.ftz != 0, false, false, hset2.compare_op,
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Swizzle::H1_H0);
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}
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} // namespace Shader::Maxwell
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@ -24,17 +24,17 @@ void HSETP2(TranslatorVisitor& v, u64 insn, const IR::U32& src_b, bool neg_b, bo
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auto [lhs_a, rhs_a]{Extract(v.ir, v.X(hsetp2.src_a_reg), hsetp2.swizzle_a)};
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auto [lhs_b, rhs_b]{Extract(v.ir, src_b, swizzle_b)};
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// TODO: Implement FP16 FloatingPointCompare
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// if (lhs_a.Type() != lhs_b.Type()) {
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if (lhs_a.Type() == IR::Type::F16) {
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lhs_a = v.ir.FPConvert(32, lhs_a);
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rhs_a = v.ir.FPConvert(32, rhs_a);
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if (lhs_a.Type() != lhs_b.Type()) {
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if (lhs_a.Type() == IR::Type::F16) {
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lhs_a = v.ir.FPConvert(32, lhs_a);
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rhs_a = v.ir.FPConvert(32, rhs_a);
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}
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if (lhs_b.Type() == IR::Type::F16) {
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lhs_b = v.ir.FPConvert(32, lhs_b);
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rhs_b = v.ir.FPConvert(32, rhs_b);
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}
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}
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if (lhs_b.Type() == IR::Type::F16) {
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lhs_b = v.ir.FPConvert(32, lhs_b);
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rhs_b = v.ir.FPConvert(32, rhs_b);
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}
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//}
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lhs_a = v.ir.FPAbsNeg(lhs_a, hsetp2.abs_a != 0, hsetp2.neg_a != 0);
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rhs_a = v.ir.FPAbsNeg(rhs_a, hsetp2.abs_a != 0, hsetp2.neg_a != 0);
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@ -50,6 +50,30 @@ IR::Opcode Replace(IR::Opcode op) {
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return IR::Opcode::CompositeInsertF32x3;
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case IR::Opcode::CompositeInsertF16x4:
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return IR::Opcode::CompositeInsertF32x4;
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case IR::Opcode::FPOrdEqual16:
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return IR::Opcode::FPOrdEqual32;
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case IR::Opcode::FPUnordEqual16:
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return IR::Opcode::FPUnordEqual32;
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case IR::Opcode::FPOrdNotEqual16:
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return IR::Opcode::FPOrdNotEqual32;
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case IR::Opcode::FPUnordNotEqual16:
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return IR::Opcode::FPUnordNotEqual32;
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case IR::Opcode::FPOrdLessThan16:
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return IR::Opcode::FPOrdLessThan32;
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case IR::Opcode::FPUnordLessThan16:
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return IR::Opcode::FPUnordLessThan32;
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case IR::Opcode::FPOrdGreaterThan16:
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return IR::Opcode::FPOrdGreaterThan32;
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case IR::Opcode::FPUnordGreaterThan16:
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return IR::Opcode::FPUnordGreaterThan32;
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case IR::Opcode::FPOrdLessThanEqual16:
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return IR::Opcode::FPOrdLessThanEqual32;
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case IR::Opcode::FPUnordLessThanEqual16:
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return IR::Opcode::FPUnordLessThanEqual32;
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case IR::Opcode::FPOrdGreaterThanEqual16:
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return IR::Opcode::FPOrdGreaterThanEqual32;
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case IR::Opcode::FPUnordGreaterThanEqual16:
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return IR::Opcode::FPUnordGreaterThanEqual32;
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case IR::Opcode::ConvertS16F16:
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return IR::Opcode::ConvertS16F32;
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case IR::Opcode::ConvertS32F16:
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