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Merge pull request #1259 from lioncash/zero
armstate: Zero out the registers on creation
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commit
32f92b4a69
@ -193,23 +193,23 @@ public:
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return TFlag ? 2 : 4;
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return TFlag ? 2 : 4;
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}
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}
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std::array<u32, 16> Reg; // The current register file
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std::array<u32, 16> Reg{}; // The current register file
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std::array<u32, 2> Reg_usr;
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std::array<u32, 2> Reg_usr{};
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std::array<u32, 2> Reg_svc; // R13_SVC R14_SVC
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std::array<u32, 2> Reg_svc{}; // R13_SVC R14_SVC
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std::array<u32, 2> Reg_abort; // R13_ABORT R14_ABORT
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std::array<u32, 2> Reg_abort{}; // R13_ABORT R14_ABORT
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std::array<u32, 2> Reg_undef; // R13 UNDEF R14 UNDEF
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std::array<u32, 2> Reg_undef{}; // R13 UNDEF R14 UNDEF
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std::array<u32, 2> Reg_irq; // R13_IRQ R14_IRQ
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std::array<u32, 2> Reg_irq{}; // R13_IRQ R14_IRQ
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std::array<u32, 7> Reg_firq; // R8---R14 FIRQ
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std::array<u32, 7> Reg_firq{}; // R8---R14 FIRQ
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std::array<u32, 7> Spsr; // The exception psr's
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std::array<u32, 7> Spsr{}; // The exception psr's
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std::array<u32, CP15_REGISTER_COUNT> CP15;
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std::array<u32, CP15_REGISTER_COUNT> CP15{};
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// FPSID, FPSCR, and FPEXC
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// FPSID, FPSCR, and FPEXC
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std::array<u32, VFP_SYSTEM_REGISTER_COUNT> VFP;
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std::array<u32, VFP_SYSTEM_REGISTER_COUNT> VFP{};
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// VFPv2 and VFPv3-D16 has 16 doubleword registers (D0-D16 or S0-S31).
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// VFPv2 and VFPv3-D16 has 16 doubleword registers (D0-D16 or S0-S31).
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// VFPv3-D32/ASIMD may have up to 32 doubleword registers (D0-D31),
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// VFPv3-D32/ASIMD may have up to 32 doubleword registers (D0-D31),
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// and only 32 singleword registers are accessible (S0-S31).
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// and only 32 singleword registers are accessible (S0-S31).
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std::array<u32, 64> ExtReg;
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std::array<u32, 64> ExtReg{};
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u32 Emulate; // To start and stop emulation
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u32 Emulate; // To start and stop emulation
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u32 Cpsr; // The current PSR
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u32 Cpsr; // The current PSR
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