mirror of
https://github.com/yuzu-emu/yuzu.git
synced 2024-08-22 12:13:23 +02:00
arm: Use 64-bit addressing in a bunch of places.
This commit is contained in:
parent
1c4f9e822c
commit
3411883fe3
@ -47,8 +47,8 @@ typedef double f64; ///< 64-bit floating point
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// TODO: It would be nice to eventually replace these with strong types that prevent accidental
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// TODO: It would be nice to eventually replace these with strong types that prevent accidental
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// conversion between each other.
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// conversion between each other.
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typedef u32 VAddr; ///< Represents a pointer in the userspace virtual address space.
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typedef u64 VAddr; ///< Represents a pointer in the userspace virtual address space.
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typedef u32 PAddr; ///< Represents a pointer in the ARM11 physical address space.
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typedef u64 PAddr; ///< Represents a pointer in the ARM11 physical address space.
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// An inheritable class to disallow the copy constructor and operator= functions
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// An inheritable class to disallow the copy constructor and operator= functions
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class NonCopyable {
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class NonCopyable {
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@ -14,14 +14,14 @@ public:
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virtual ~ARM_Interface() {}
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virtual ~ARM_Interface() {}
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struct ThreadContext {
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struct ThreadContext {
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u32 cpu_registers[13];
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u64 cpu_registers[30];
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u32 sp;
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u64 lr;
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u32 lr;
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u64 sp;
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u32 pc;
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u64 pc;
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u32 cpsr;
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u64 cpsr;
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u32 fpu_registers[64];
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u64 fpu_registers[64];
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u32 fpscr;
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u64 fpscr;
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u32 fpexc;
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u64 fpexc;
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};
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};
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/**
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/**
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@ -45,27 +45,27 @@ public:
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* Set the Program Counter to an address
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* Set the Program Counter to an address
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* @param addr Address to set PC to
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* @param addr Address to set PC to
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*/
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*/
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virtual void SetPC(u32 addr) = 0;
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virtual void SetPC(u64 addr) = 0;
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/*
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/*
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* Get the current Program Counter
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* Get the current Program Counter
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* @return Returns current PC
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* @return Returns current PC
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*/
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*/
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virtual u32 GetPC() const = 0;
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virtual u64 GetPC() const = 0;
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/**
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/**
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* Get an ARM register
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* Get an ARM register
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* @param index Register index (0-15)
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* @param index Register index
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* @return Returns the value in the register
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* @return Returns the value in the register
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*/
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*/
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virtual u32 GetReg(int index) const = 0;
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virtual u64 GetReg(int index) const = 0;
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/**
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/**
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* Set an ARM register
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* Set an ARM register
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* @param index Register index (0-15)
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* @param index Register index
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* @param value Value to set register to
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* @param value Value to set register to
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*/
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*/
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virtual void SetReg(int index, u32 value) = 0;
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virtual void SetReg(int index, u64 value) = 0;
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/**
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/**
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* Gets the value of a VFP register
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* Gets the value of a VFP register
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@ -14,72 +14,105 @@
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#include "core/hle/svc.h"
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#include "core/hle/svc.h"
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#include "core/memory.h"
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#include "core/memory.h"
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static void InterpreterFallback(u32 pc, Dynarmic::Jit* jit, void* user_arg) {
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static void InterpreterFallback(u64 pc, Dynarmic::Jit* jit, void* user_arg) {
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ARMul_State* state = static_cast<ARMul_State*>(user_arg);
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UNIMPLEMENTED_MSG("InterpreterFallback for ARM64 JIT does not exist!");
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//ARMul_State* state = static_cast<ARMul_State*>(user_arg);
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state->Reg = jit->Regs();
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//state->Reg = jit->Regs();
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state->Cpsr = jit->Cpsr();
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//state->Cpsr = jit->Cpsr();
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state->Reg[15] = pc;
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//state->Reg[15] = static_cast<u32>(pc);
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state->ExtReg = jit->ExtRegs();
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//state->ExtReg = jit->ExtRegs();
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state->VFP[VFP_FPSCR] = jit->Fpscr();
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//state->VFP[VFP_FPSCR] = jit->Fpscr();
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state->NumInstrsToExecute = 1;
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//state->NumInstrsToExecute = 1;
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InterpreterMainLoop(state);
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//InterpreterMainLoop(state);
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bool is_thumb = (state->Cpsr & (1 << 5)) != 0;
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//bool is_thumb = (state->Cpsr & (1 << 5)) != 0;
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state->Reg[15] &= (is_thumb ? 0xFFFFFFFE : 0xFFFFFFFC);
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//state->Reg[15] &= (is_thumb ? 0xFFFFFFFE : 0xFFFFFFFC);
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jit->Regs() = state->Reg;
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//jit->Regs() = state->Reg;
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jit->Cpsr() = state->Cpsr;
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//jit->Cpsr() = state->Cpsr;
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jit->ExtRegs() = state->ExtReg;
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//jit->ExtRegs() = state->ExtReg;
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jit->SetFpscr(state->VFP[VFP_FPSCR]);
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//jit->SetFpscr(state->VFP[VFP_FPSCR]);
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}
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}
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static bool IsReadOnlyMemory(u32 vaddr) {
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static bool IsReadOnlyMemory(u64 vaddr) {
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// TODO(bunnei): ImplementMe
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// TODO(bunnei): ImplementMe
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return false;
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return false;
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}
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}
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u8 MemoryRead8(const u64 addr) {
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return Memory::Read8(static_cast<VAddr>(addr));
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}
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u16 MemoryRead16(const u64 addr) {
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return Memory::Read16(static_cast<VAddr>(addr));
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}
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u32 MemoryRead32(const u64 addr) {
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return Memory::Read32(static_cast<VAddr>(addr));
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}
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u64 MemoryRead64(const u64 addr) {
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return Memory::Read64(static_cast<VAddr>(addr));
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}
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void MemoryWrite8(const u64 addr, const u8 data) {
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Memory::Write8(static_cast<VAddr>(addr), data);
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}
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void MemoryWrite16(const u64 addr, const u16 data) {
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Memory::Write16(static_cast<VAddr>(addr), data);
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}
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void MemoryWrite32(const u64 addr, const u32 data) {
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Memory::Write32(static_cast<VAddr>(addr), data);
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}
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void MemoryWrite64(const u64 addr, const u64 data) {
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Memory::Write64(static_cast<VAddr>(addr), data);
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}
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static Dynarmic::UserCallbacks GetUserCallbacks(
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static Dynarmic::UserCallbacks GetUserCallbacks(
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const std::shared_ptr<ARMul_State>& interpeter_state) {
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const std::shared_ptr<ARMul_State>& interpeter_state) {
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Dynarmic::UserCallbacks user_callbacks{};
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Dynarmic::UserCallbacks user_callbacks{};
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user_callbacks.InterpreterFallback = &InterpreterFallback;
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//user_callbacks.InterpreterFallback = &InterpreterFallback;
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user_callbacks.user_arg = static_cast<void*>(interpeter_state.get());
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//user_callbacks.user_arg = static_cast<void*>(interpeter_state.get());
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user_callbacks.CallSVC = &SVC::CallSVC;
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user_callbacks.CallSVC = &SVC::CallSVC;
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user_callbacks.memory.IsReadOnlyMemory = &IsReadOnlyMemory;
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user_callbacks.memory.IsReadOnlyMemory = &IsReadOnlyMemory;
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user_callbacks.memory.ReadCode = &Memory::Read32;
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user_callbacks.memory.ReadCode = &MemoryRead32;
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user_callbacks.memory.Read8 = &Memory::Read8;
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user_callbacks.memory.Read8 = &MemoryRead8;
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user_callbacks.memory.Read16 = &Memory::Read16;
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user_callbacks.memory.Read16 = &MemoryRead16;
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user_callbacks.memory.Read32 = &Memory::Read32;
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user_callbacks.memory.Read32 = &MemoryRead32;
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user_callbacks.memory.Read64 = &Memory::Read64;
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user_callbacks.memory.Read64 = &MemoryRead64;
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user_callbacks.memory.Write8 = &Memory::Write8;
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user_callbacks.memory.Write8 = &MemoryWrite8;
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user_callbacks.memory.Write16 = &Memory::Write16;
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user_callbacks.memory.Write16 = &MemoryWrite16;
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user_callbacks.memory.Write32 = &Memory::Write32;
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user_callbacks.memory.Write32 = &MemoryWrite32;
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user_callbacks.memory.Write64 = &Memory::Write64;
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user_callbacks.memory.Write64 = &MemoryWrite64;
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user_callbacks.page_table = Memory::GetCurrentPageTablePointers();
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//user_callbacks.page_table = Memory::GetCurrentPageTablePointers();
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user_callbacks.coprocessors[15] = std::make_shared<DynarmicCP15>(interpeter_state);
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user_callbacks.coprocessors[15] = std::make_shared<DynarmicCP15>(interpeter_state);
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return user_callbacks;
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return user_callbacks;
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}
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}
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ARM_Dynarmic::ARM_Dynarmic(PrivilegeMode initial_mode) {
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ARM_Dynarmic::ARM_Dynarmic(PrivilegeMode initial_mode) {
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interpreter_state = std::make_shared<ARMul_State>(initial_mode);
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interpreter_state = std::make_shared<ARMul_State>(initial_mode);
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jit = std::make_unique<Dynarmic::Jit>(GetUserCallbacks(interpreter_state));
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jit = std::make_unique<Dynarmic::Jit>(GetUserCallbacks(interpreter_state), Dynarmic::Arch::ARM64);
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}
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}
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void ARM_Dynarmic::SetPC(u32 pc) {
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void ARM_Dynarmic::SetPC(u64 pc) {
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jit->Regs()[15] = pc;
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jit->Regs64()[32] = pc;
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}
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}
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u32 ARM_Dynarmic::GetPC() const {
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u64 ARM_Dynarmic::GetPC() const {
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return jit->Regs()[15];
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return jit->Regs64()[32];
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}
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}
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u32 ARM_Dynarmic::GetReg(int index) const {
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u64 ARM_Dynarmic::GetReg(int index) const {
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return jit->Regs()[index];
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return jit->Regs64()[index];
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}
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}
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void ARM_Dynarmic::SetReg(int index, u32 value) {
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void ARM_Dynarmic::SetReg(int index, u64 value) {
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jit->Regs()[index] = value;
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jit->Regs64()[index] = value;
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}
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}
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u32 ARM_Dynarmic::GetVFPReg(int index) const {
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u32 ARM_Dynarmic::GetVFPReg(int index) const {
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@ -136,18 +169,18 @@ MICROPROFILE_DEFINE(ARM_Jit, "ARM JIT", "ARM JIT", MP_RGB(255, 64, 64));
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void ARM_Dynarmic::ExecuteInstructions(int num_instructions) {
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void ARM_Dynarmic::ExecuteInstructions(int num_instructions) {
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MICROPROFILE_SCOPE(ARM_Jit);
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MICROPROFILE_SCOPE(ARM_Jit);
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unsigned ticks_executed = jit->Run(static_cast<unsigned>(num_instructions));
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unsigned ticks_executed = jit->Run(1 /*static_cast<unsigned>(num_instructions)*/);
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AddTicks(ticks_executed);
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AddTicks(ticks_executed);
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}
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}
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void ARM_Dynarmic::SaveContext(ARM_Interface::ThreadContext& ctx) {
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void ARM_Dynarmic::SaveContext(ARM_Interface::ThreadContext& ctx) {
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memcpy(ctx.cpu_registers, jit->Regs().data(), sizeof(ctx.cpu_registers));
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memcpy(ctx.cpu_registers, jit->Regs64().data(), sizeof(ctx.cpu_registers));
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memcpy(ctx.fpu_registers, jit->ExtRegs().data(), sizeof(ctx.fpu_registers));
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//memcpy(ctx.fpu_registers, jit->ExtRegs().data(), sizeof(ctx.fpu_registers));
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ctx.sp = jit->Regs()[13];
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ctx.lr = jit->Regs64()[30];
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ctx.lr = jit->Regs()[14];
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ctx.sp = jit->Regs64()[31];
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ctx.pc = jit->Regs()[15];
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ctx.pc = jit->Regs64()[32];
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ctx.cpsr = jit->Cpsr();
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ctx.cpsr = jit->Cpsr();
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ctx.fpscr = jit->Fpscr();
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ctx.fpscr = jit->Fpscr();
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@ -155,12 +188,12 @@ void ARM_Dynarmic::SaveContext(ARM_Interface::ThreadContext& ctx) {
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}
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}
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void ARM_Dynarmic::LoadContext(const ARM_Interface::ThreadContext& ctx) {
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void ARM_Dynarmic::LoadContext(const ARM_Interface::ThreadContext& ctx) {
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memcpy(jit->Regs().data(), ctx.cpu_registers, sizeof(ctx.cpu_registers));
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memcpy(jit->Regs64().data(), ctx.cpu_registers, sizeof(ctx.cpu_registers));
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memcpy(jit->ExtRegs().data(), ctx.fpu_registers, sizeof(ctx.fpu_registers));
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//memcpy(jit->ExtRegs().data(), ctx.fpu_registers, sizeof(ctx.fpu_registers));
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jit->Regs()[13] = ctx.sp;
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jit->Regs64()[30] = ctx.lr;
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jit->Regs()[14] = ctx.lr;
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jit->Regs64()[31] = ctx.sp;
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jit->Regs()[15] = ctx.pc;
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jit->Regs64()[32] = ctx.pc;
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jit->Cpsr() = ctx.cpsr;
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jit->Cpsr() = ctx.cpsr;
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jit->SetFpscr(ctx.fpscr);
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jit->SetFpscr(ctx.fpscr);
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@ -14,10 +14,10 @@ class ARM_Dynarmic final : public ARM_Interface {
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public:
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public:
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ARM_Dynarmic(PrivilegeMode initial_mode);
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ARM_Dynarmic(PrivilegeMode initial_mode);
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void SetPC(u32 pc) override;
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void SetPC(u64 pc) override;
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u32 GetPC() const override;
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u64 GetPC() const override;
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u32 GetReg(int index) const override;
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u64 GetReg(int index) const override;
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void SetReg(int index, u32 value) override;
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void SetReg(int index, u64 value) override;
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u32 GetVFPReg(int index) const override;
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u32 GetVFPReg(int index) const override;
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void SetVFPReg(int index, u32 value) override;
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void SetVFPReg(int index, u32 value) override;
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u32 GetVFPSystemReg(VFPSystemRegister reg) const override;
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u32 GetVFPSystemReg(VFPSystemRegister reg) const override;
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@ -25,19 +25,19 @@ void ARM_DynCom::ClearInstructionCache() {
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trans_cache_buf_top = 0;
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trans_cache_buf_top = 0;
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}
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}
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void ARM_DynCom::SetPC(u32 pc) {
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void ARM_DynCom::SetPC(u64 pc) {
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state->Reg[15] = pc;
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state->Reg[15] = pc;
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}
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}
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u32 ARM_DynCom::GetPC() const {
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u64 ARM_DynCom::GetPC() const {
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return state->Reg[15];
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return state->Reg[15];
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}
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}
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u32 ARM_DynCom::GetReg(int index) const {
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u64 ARM_DynCom::GetReg(int index) const {
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return state->Reg[index];
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return state->Reg[index];
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}
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}
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void ARM_DynCom::SetReg(int index, u32 value) {
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void ARM_DynCom::SetReg(int index, u64 value) {
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state->Reg[index] = value;
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state->Reg[index] = value;
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}
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}
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void ClearInstructionCache() override;
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void ClearInstructionCache() override;
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void SetPC(u32 pc) override;
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void SetPC(u64 pc) override;
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u32 GetPC() const override;
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u64 GetPC() const override;
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u32 GetReg(int index) const override;
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u64 GetReg(int index) const override;
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void SetReg(int index, u32 value) override;
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void SetReg(int index, u64 value) override;
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u32 GetVFPReg(int index) const override;
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u32 GetVFPReg(int index) const override;
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void SetVFPReg(int index, u32 value) override;
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void SetVFPReg(int index, u32 value) override;
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u32 GetVFPSystemReg(VFPSystemRegister reg) const override;
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u32 GetVFPSystemReg(VFPSystemRegister reg) const override;
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@ -69,7 +69,7 @@ void HandlePacket();
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* @param addr Address to search from.
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* @param addr Address to search from.
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* @param type Type of breakpoint.
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* @param type Type of breakpoint.
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*/
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*/
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BreakpointAddress GetNextBreakpointFromAddress(u32 addr, GDBStub::BreakpointType type);
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BreakpointAddress GetNextBreakpointFromAddress(PAddr addr, GDBStub::BreakpointType type);
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/**
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/**
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* Check if a breakpoint of the specified type exists at the given address.
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* Check if a breakpoint of the specified type exists at the given address.
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@ -77,7 +77,7 @@ BreakpointAddress GetNextBreakpointFromAddress(u32 addr, GDBStub::BreakpointType
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* @param addr Address of breakpoint.
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* @param addr Address of breakpoint.
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* @param type Type of breakpoint.
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* @param type Type of breakpoint.
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*/
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*/
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bool CheckBreakpoint(u32 addr, GDBStub::BreakpointType type);
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bool CheckBreakpoint(PAddr addr, GDBStub::BreakpointType type);
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// If set to true, the CPU will halt at the beginning of the next CPU loop.
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// If set to true, the CPU will halt at the beginning of the next CPU loop.
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bool GetCpuHaltFlag();
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bool GetCpuHaltFlag();
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@ -20,7 +20,7 @@ namespace HLE {
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* HLE a function return from the current ARM11 userland process
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* HLE a function return from the current ARM11 userland process
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* @param res Result to return
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* @param res Result to return
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*/
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*/
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static inline void FuncReturn(u32 res) {
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static inline void FuncReturn(u64 res) {
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Core::CPU().SetReg(0, res);
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Core::CPU().SetReg(0, res);
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}
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}
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@ -274,7 +274,7 @@ ResultVal<VAddr> CROHelper::RebaseSegmentTable(u32 cro_size, VAddr data_segment_
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}
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}
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SetEntry(i, segment);
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SetEntry(i, segment);
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}
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}
|
||||||
return MakeResult<u32>(prev_data_segment + module_address);
|
return MakeResult<VAddr>(prev_data_segment + module_address);
|
||||||
}
|
}
|
||||||
|
|
||||||
ResultCode CROHelper::RebaseExportNamedSymbolTable() {
|
ResultCode CROHelper::RebaseExportNamedSymbolTable() {
|
||||||
|
Loading…
Reference in New Issue
Block a user