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Merge pull request #8729 from merryhime/cp15-barriers
arm_dynarmic_cp15: Implement CP15DMB/CP15DSB/CP15ISB
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commit
4bd8adfe42
@ -8,6 +8,10 @@
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#include "core/core.h"
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#include "core/core.h"
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#include "core/core_timing.h"
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#include "core/core_timing.h"
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#ifdef _MSC_VER
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#include <intrin.h>
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#endif
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using Callback = Dynarmic::A32::Coprocessor::Callback;
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using Callback = Dynarmic::A32::Coprocessor::Callback;
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using CallbackOrAccessOneWord = Dynarmic::A32::Coprocessor::CallbackOrAccessOneWord;
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using CallbackOrAccessOneWord = Dynarmic::A32::Coprocessor::CallbackOrAccessOneWord;
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using CallbackOrAccessTwoWords = Dynarmic::A32::Coprocessor::CallbackOrAccessTwoWords;
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using CallbackOrAccessTwoWords = Dynarmic::A32::Coprocessor::CallbackOrAccessTwoWords;
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@ -47,12 +51,31 @@ CallbackOrAccessOneWord DynarmicCP15::CompileSendOneWord(bool two, unsigned opc1
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switch (opc2) {
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switch (opc2) {
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case 4:
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case 4:
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// CP15_DATA_SYNC_BARRIER
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// CP15_DATA_SYNC_BARRIER
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// This is a dummy write, we ignore the value written here.
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return Callback{
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return &dummy_value;
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[](Dynarmic::A32::Jit*, void*, std::uint32_t, std::uint32_t) -> std::uint64_t {
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#ifdef _MSC_VER
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_mm_mfence();
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_mm_lfence();
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#else
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asm volatile("mfence\n\tlfence\n\t" : : : "memory");
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#endif
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return 0;
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},
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std::nullopt,
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};
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case 5:
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case 5:
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// CP15_DATA_MEMORY_BARRIER
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// CP15_DATA_MEMORY_BARRIER
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// This is a dummy write, we ignore the value written here.
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return Callback{
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return &dummy_value;
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[](Dynarmic::A32::Jit*, void*, std::uint32_t, std::uint32_t) -> std::uint64_t {
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#ifdef _MSC_VER
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_mm_mfence();
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#else
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asm volatile("mfence\n\t" : : : "memory");
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#endif
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return 0;
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},
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std::nullopt,
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};
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}
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}
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}
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}
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@ -35,6 +35,8 @@ public:
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ARM_Dynarmic_32& parent;
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ARM_Dynarmic_32& parent;
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u32 uprw = 0;
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u32 uprw = 0;
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u32 uro = 0;
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u32 uro = 0;
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friend class ARM_Dynarmic_32;
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};
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};
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} // namespace Core
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} // namespace Core
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