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Merge pull request #357 from bunnei/dyncom-pkhbt-pkhtb
Implement PKHBT and PKHTB on dyncom, fix on armemu
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commit
4bf803579f
@ -1427,6 +1427,13 @@ typedef struct _blx_1_thumb {
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unsigned int instr;
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}blx_1_thumb;
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typedef struct _pkh_inst {
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u32 Rm;
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u32 Rn;
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u32 Rd;
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u8 imm;
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} pkh_inst;
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typedef arm_inst * ARM_INST_PTR;
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#define CACHE_BUFFER_SIZE (64 * 1024 * 2000)
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@ -2376,8 +2383,30 @@ ARM_INST_PTR INTERPRETER_TRANSLATE(orr)(unsigned int inst, int index)
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}
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return inst_base;
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}
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ARM_INST_PTR INTERPRETER_TRANSLATE(pkhbt)(unsigned int inst, int index) { UNIMPLEMENTED_INSTRUCTION("PKHBT"); }
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ARM_INST_PTR INTERPRETER_TRANSLATE(pkhtb)(unsigned int inst, int index) { UNIMPLEMENTED_INSTRUCTION("PKHTB"); }
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ARM_INST_PTR INTERPRETER_TRANSLATE(pkhbt)(unsigned int inst, int index)
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{
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arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(pkh_inst));
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pkh_inst *inst_cream = (pkh_inst *)inst_base->component;
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inst_base->cond = BITS(inst, 28, 31);
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inst_base->idx = index;
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inst_base->br = NON_BRANCH;
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inst_base->load_r15 = 0;
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inst_cream->Rd = BITS(inst, 12, 15);
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inst_cream->Rn = BITS(inst, 16, 19);
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inst_cream->Rm = BITS(inst, 0, 3);
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inst_cream->imm = BITS(inst, 7, 11);
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return inst_base;
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}
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ARM_INST_PTR INTERPRETER_TRANSLATE(pkhtb)(unsigned int inst, int index)
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{
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return INTERPRETER_TRANSLATE(pkhbt)(inst, index);
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}
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ARM_INST_PTR INTERPRETER_TRANSLATE(pld)(unsigned int inst, int index)
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{
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arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(pld_inst));
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@ -5659,8 +5688,34 @@ unsigned InterpreterMainLoop(ARMul_State* state)
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FETCH_INST;
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GOTO_NEXT_INST;
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}
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PKHBT_INST:
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{
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INC_ICOUNTER;
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if (inst_base->cond == 0xE || CondPassed(cpu, inst_base->cond)) {
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pkh_inst *inst_cream = (pkh_inst *)inst_base->component;
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RD = (RN & 0xFFFF) | ((RM << inst_cream->imm) & 0xFFFF0000);
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}
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cpu->Reg[15] += GET_INST_SIZE(cpu);
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INC_PC(sizeof(pkh_inst));
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FETCH_INST;
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GOTO_NEXT_INST;
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}
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PKHTB_INST:
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{
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INC_ICOUNTER;
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if (inst_base->cond == 0xE || CondPassed(cpu, inst_base->cond)) {
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pkh_inst *inst_cream = (pkh_inst *)inst_base->component;
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int shift_imm = inst_cream->imm ? inst_cream->imm : 31;
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RD = ((static_cast<s32>(RM) >> shift_imm) & 0xFFFF) | (RN & 0xFFFF0000);
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}
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cpu->Reg[15] += GET_INST_SIZE(cpu);
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INC_PC(sizeof(pkh_inst));
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FETCH_INST;
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GOTO_NEXT_INST;
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}
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PLD_INST:
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{
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INC_ICOUNTER;
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@ -3100,7 +3100,6 @@ mainswitch:
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break;
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case 0x68: /* Store Word, No WriteBack, Post Inc, Reg. */
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//ichfly PKHBT PKHTB todo check this
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if ((instr & 0x70) == 0x10) { //pkhbt
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u8 idest = BITS(12, 15);
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u8 rfis = BITS(16, 19);
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@ -3109,18 +3108,11 @@ mainswitch:
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state->Reg[idest] = (state->Reg[rfis] & 0xFFFF) | ((state->Reg[rlast] << ishi) & 0xFFFF0000);
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break;
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} else if ((instr & 0x70) == 0x50) { //pkhtb
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const u8 rd_idx = BITS(12, 15);
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const u8 rn_idx = BITS(16, 19);
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const u8 rm_idx = BITS(0, 3);
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const u8 imm5 = BITS(7, 11);
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ARMword val;
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if (imm5 >= 32)
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val = (state->Reg[rm_idx] >> 31);
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else
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val = (state->Reg[rm_idx] >> imm5);
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state->Reg[rd_idx] = (val & 0xFFFF) | ((state->Reg[rn_idx]) & 0xFFFF0000);
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u8 rd_idx = BITS(12, 15);
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u8 rn_idx = BITS(16, 19);
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u8 rm_idx = BITS(0, 3);
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u8 imm5 = BITS(7, 11) ? BITS(7, 11) : 31;
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state->Reg[rd_idx] = ((static_cast<s32>(state->Reg[rm_idx]) >> imm5) & 0xFFFF) | ((state->Reg[rn_idx]) & 0xFFFF0000);
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break;
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} else if (BIT (4)) {
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#ifdef MODE32
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