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Implemented NVHOST_IOCTL_CHANNEL_GET_WAITBASE (#440)
* Implemented NVHOST_IOCTL_CHANNEL_GET_WAITBASE struct + 4 seems to be hard coded at 0 and struct + 0 seems to be ignored? * IocGetWaitbase -> IocChannelGetWaitbaseCommand * Added super late fixes
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@ -32,6 +32,8 @@ u32 nvhost_gpu::ioctl(Ioctl command, const std::vector<u8>& input, std::vector<u
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return AllocGPFIFOEx2(input, output);
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case IoctlCommand::IocAllocObjCtxCommand:
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return AllocateObjectContext(input, output);
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case IoctlCommand::IocChannelGetWaitbaseCommand:
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return GetWaitbase(input, output);
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}
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if (command.group == NVGPU_IOCTL_MAGIC) {
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@ -138,4 +140,13 @@ u32 nvhost_gpu::SubmitGPFIFO(const std::vector<u8>& input, std::vector<u8>& outp
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return 0;
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}
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u32 nvhost_gpu::GetWaitbase(const std::vector<u8>& input, std::vector<u8>& output) {
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IoctlGetWaitbase params{};
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std::memcpy(¶ms, input.data(), sizeof(IoctlGetWaitbase));
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NGLOG_INFO(Service_NVDRV, "called, unknown=0x{:X}", params.unknown);
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params.value = 0; // Seems to be hard coded at 0
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std::memcpy(output.data(), ¶ms, output.size());
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return 0;
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}
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} // namespace Service::Nvidia::Devices
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@ -33,6 +33,7 @@ private:
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IocChannelSetPriorityCommand = 0x4004480D,
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IocAllocGPFIFOEx2Command = 0xC020481A,
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IocAllocObjCtxCommand = 0xC0104809,
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IocChannelGetWaitbaseCommand = 0xC0080003,
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};
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enum class CtxObjects : u32_le {
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@ -117,7 +118,13 @@ private:
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IoctlFence fence_out; // returned new fence object for others to wait on
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};
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static_assert(sizeof(IoctlSubmitGpfifo) == 16 + sizeof(IoctlFence),
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"submit_gpfifo is incorrect size");
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"IoctlSubmitGpfifo is incorrect size");
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struct IoctlGetWaitbase {
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u32 unknown; // seems to be ignored? Nintendo added this
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u32 value;
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};
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static_assert(sizeof(IoctlGetWaitbase) == 8, "IoctlGetWaitbase is incorrect size");
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u32_le nvmap_fd{};
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u64_le user_data{};
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@ -133,6 +140,7 @@ private:
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u32 AllocGPFIFOEx2(const std::vector<u8>& input, std::vector<u8>& output);
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u32 AllocateObjectContext(const std::vector<u8>& input, std::vector<u8>& output);
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u32 SubmitGPFIFO(const std::vector<u8>& input, std::vector<u8>& output);
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u32 GetWaitbase(const std::vector<u8>& input, std::vector<u8>& output);
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std::shared_ptr<nvmap> nvmap_dev;
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};
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