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Merge pull request #4006 from ReinUsesLisp/squash-ubos
glsl: Squash constant buffers into a single SSBO when we hit the limit
This commit is contained in:
commit
597d8b4bd4
@ -6,6 +6,7 @@
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#include <array>
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#include <cstddef>
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#include <cstring>
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#include <limits>
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#include <optional>
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#include <vector>
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@ -26,24 +27,27 @@ constexpr u32 ReservedUniformBlocks = 1;
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constexpr u32 NumStages = 5;
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constexpr std::array LimitUBOs = {GL_MAX_VERTEX_UNIFORM_BLOCKS, GL_MAX_TESS_CONTROL_UNIFORM_BLOCKS,
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GL_MAX_TESS_EVALUATION_UNIFORM_BLOCKS,
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GL_MAX_GEOMETRY_UNIFORM_BLOCKS, GL_MAX_FRAGMENT_UNIFORM_BLOCKS};
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constexpr std::array LimitUBOs = {
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GL_MAX_VERTEX_UNIFORM_BLOCKS, GL_MAX_TESS_CONTROL_UNIFORM_BLOCKS,
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GL_MAX_TESS_EVALUATION_UNIFORM_BLOCKS, GL_MAX_GEOMETRY_UNIFORM_BLOCKS,
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GL_MAX_FRAGMENT_UNIFORM_BLOCKS, GL_MAX_COMPUTE_UNIFORM_BLOCKS};
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constexpr std::array LimitSSBOs = {
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GL_MAX_VERTEX_SHADER_STORAGE_BLOCKS, GL_MAX_TESS_CONTROL_SHADER_STORAGE_BLOCKS,
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GL_MAX_VERTEX_SHADER_STORAGE_BLOCKS, GL_MAX_TESS_CONTROL_SHADER_STORAGE_BLOCKS,
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GL_MAX_TESS_EVALUATION_SHADER_STORAGE_BLOCKS, GL_MAX_GEOMETRY_SHADER_STORAGE_BLOCKS,
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GL_MAX_FRAGMENT_SHADER_STORAGE_BLOCKS};
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GL_MAX_FRAGMENT_SHADER_STORAGE_BLOCKS, GL_MAX_COMPUTE_SHADER_STORAGE_BLOCKS};
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constexpr std::array LimitSamplers = {
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GL_MAX_VERTEX_TEXTURE_IMAGE_UNITS, GL_MAX_TESS_CONTROL_TEXTURE_IMAGE_UNITS,
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GL_MAX_TESS_EVALUATION_TEXTURE_IMAGE_UNITS, GL_MAX_GEOMETRY_TEXTURE_IMAGE_UNITS,
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GL_MAX_TEXTURE_IMAGE_UNITS};
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constexpr std::array LimitSamplers = {GL_MAX_VERTEX_TEXTURE_IMAGE_UNITS,
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GL_MAX_TESS_CONTROL_TEXTURE_IMAGE_UNITS,
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GL_MAX_TESS_EVALUATION_TEXTURE_IMAGE_UNITS,
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GL_MAX_GEOMETRY_TEXTURE_IMAGE_UNITS,
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GL_MAX_TEXTURE_IMAGE_UNITS,
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GL_MAX_COMPUTE_TEXTURE_IMAGE_UNITS};
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constexpr std::array LimitImages = {GL_MAX_VERTEX_IMAGE_UNIFORMS,
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GL_MAX_TESS_CONTROL_IMAGE_UNIFORMS,
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GL_MAX_TESS_EVALUATION_IMAGE_UNIFORMS,
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GL_MAX_GEOMETRY_IMAGE_UNIFORMS, GL_MAX_FRAGMENT_IMAGE_UNIFORMS};
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constexpr std::array LimitImages = {
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GL_MAX_VERTEX_IMAGE_UNIFORMS, GL_MAX_TESS_CONTROL_IMAGE_UNIFORMS,
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GL_MAX_TESS_EVALUATION_IMAGE_UNIFORMS, GL_MAX_GEOMETRY_IMAGE_UNIFORMS,
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GL_MAX_FRAGMENT_IMAGE_UNIFORMS, GL_MAX_COMPUTE_IMAGE_UNIFORMS};
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template <typename T>
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T GetInteger(GLenum pname) {
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@ -85,6 +89,13 @@ u32 Extract(u32& base, u32& num, u32 amount, std::optional<GLenum> limit = {}) {
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return std::exchange(base, base + amount);
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}
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std::array<u32, Tegra::Engines::MaxShaderTypes> BuildMaxUniformBuffers() noexcept {
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std::array<u32, Tegra::Engines::MaxShaderTypes> max;
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std::transform(LimitUBOs.begin(), LimitUBOs.end(), max.begin(),
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[](GLenum pname) { return GetInteger<u32>(pname); });
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return max;
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}
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std::array<Device::BaseBindings, Tegra::Engines::MaxShaderTypes> BuildBaseBindings() noexcept {
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std::array<Device::BaseBindings, Tegra::Engines::MaxShaderTypes> bindings;
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@ -159,7 +170,8 @@ bool IsASTCSupported() {
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} // Anonymous namespace
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Device::Device() : base_bindings{BuildBaseBindings()} {
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Device::Device()
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: max_uniform_buffers{BuildMaxUniformBuffers()}, base_bindings{BuildBaseBindings()} {
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const std::string_view vendor = reinterpret_cast<const char*>(glGetString(GL_VENDOR));
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const auto renderer = reinterpret_cast<const char*>(glGetString(GL_RENDERER));
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const std::vector extensions = GetExtensions();
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@ -194,7 +206,9 @@ Device::Device() : base_bindings{BuildBaseBindings()} {
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}
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Device::Device(std::nullptr_t) {
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uniform_buffer_alignment = 0;
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max_uniform_buffers.fill(std::numeric_limits<u32>::max());
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uniform_buffer_alignment = 4;
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shader_storage_alignment = 4;
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max_vertex_attributes = 16;
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max_varyings = 15;
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has_warp_intrinsics = true;
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@ -202,8 +216,6 @@ Device::Device(std::nullptr_t) {
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has_vertex_viewport_layer = true;
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has_image_load_formatted = true;
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has_variable_aoffi = true;
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has_component_indexing_bug = false;
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has_precise_bug = false;
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}
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bool Device::TestVariableAoffi() {
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@ -24,6 +24,10 @@ public:
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explicit Device();
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explicit Device(std::nullptr_t);
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u32 GetMaxUniformBuffers(Tegra::Engines::ShaderType shader_type) const noexcept {
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return max_uniform_buffers[static_cast<std::size_t>(shader_type)];
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}
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const BaseBindings& GetBaseBindings(std::size_t stage_index) const noexcept {
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return base_bindings[stage_index];
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}
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@ -92,7 +96,8 @@ private:
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static bool TestVariableAoffi();
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static bool TestPreciseBug();
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std::array<BaseBindings, Tegra::Engines::MaxShaderTypes> base_bindings;
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std::array<u32, Tegra::Engines::MaxShaderTypes> max_uniform_buffers{};
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std::array<BaseBindings, Tegra::Engines::MaxShaderTypes> base_bindings{};
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std::size_t uniform_buffer_alignment{};
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std::size_t shader_storage_alignment{};
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u32 max_vertex_attributes{};
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@ -54,6 +54,12 @@ MICROPROFILE_DEFINE(OpenGL_PrimitiveAssembly, "OpenGL", "Prim Asmbl", MP_RGB(255
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namespace {
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constexpr std::size_t NUM_CONST_BUFFERS_PER_STAGE = 18;
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constexpr std::size_t NUM_CONST_BUFFERS_BYTES_PER_STAGE =
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NUM_CONST_BUFFERS_PER_STAGE * Maxwell::MaxConstBufferSize;
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constexpr std::size_t TOTAL_CONST_BUFFER_BYTES =
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NUM_CONST_BUFFERS_BYTES_PER_STAGE * Maxwell::MaxShaderStage;
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constexpr std::size_t NumSupportedVertexAttributes = 16;
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template <typename Engine, typename Entry>
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@ -104,6 +110,9 @@ RasterizerOpenGL::RasterizerOpenGL(Core::System& system, Core::Frontend::EmuWind
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screen_info{info}, program_manager{program_manager}, state_tracker{state_tracker} {
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CheckExtensions();
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unified_uniform_buffer.Create();
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glNamedBufferStorage(unified_uniform_buffer.handle, TOTAL_CONST_BUFFER_BYTES, nullptr, 0);
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if (device.UseAssemblyShaders()) {
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glCreateBuffers(static_cast<GLsizei>(staging_cbufs.size()), staging_cbufs.data());
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for (const GLuint cbuf : staging_cbufs) {
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@ -842,34 +851,56 @@ void RasterizerOpenGL::SetupDrawConstBuffers(std::size_t stage_index, const Shad
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MICROPROFILE_SCOPE(OpenGL_UBO);
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const auto& stages = system.GPU().Maxwell3D().state.shader_stages;
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const auto& shader_stage = stages[stage_index];
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const auto& entries = shader->GetEntries();
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const bool use_unified = entries.use_unified_uniforms;
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const std::size_t base_unified_offset = stage_index * NUM_CONST_BUFFERS_BYTES_PER_STAGE;
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u32 binding =
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device.UseAssemblyShaders() ? 0 : device.GetBaseBindings(stage_index).uniform_buffer;
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for (const auto& entry : shader->GetEntries().const_buffers) {
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const auto& buffer = shader_stage.const_buffers[entry.GetIndex()];
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SetupConstBuffer(PARAMETER_LUT[stage_index], binding++, buffer, entry);
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const auto base_bindings = device.GetBaseBindings(stage_index);
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u32 binding = device.UseAssemblyShaders() ? 0 : base_bindings.uniform_buffer;
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for (const auto& entry : entries.const_buffers) {
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const u32 index = entry.GetIndex();
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const auto& buffer = shader_stage.const_buffers[index];
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SetupConstBuffer(PARAMETER_LUT[stage_index], binding, buffer, entry, use_unified,
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base_unified_offset + index * Maxwell::MaxConstBufferSize);
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++binding;
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}
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if (use_unified) {
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const u32 index = static_cast<u32>(base_bindings.shader_storage_buffer +
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entries.global_memory_entries.size());
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glBindBufferRange(GL_SHADER_STORAGE_BUFFER, index, unified_uniform_buffer.handle,
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base_unified_offset, NUM_CONST_BUFFERS_BYTES_PER_STAGE);
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}
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}
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void RasterizerOpenGL::SetupComputeConstBuffers(const Shader& kernel) {
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MICROPROFILE_SCOPE(OpenGL_UBO);
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const auto& launch_desc = system.GPU().KeplerCompute().launch_description;
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const auto& entries = kernel->GetEntries();
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const bool use_unified = entries.use_unified_uniforms;
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u32 binding = 0;
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for (const auto& entry : kernel->GetEntries().const_buffers) {
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for (const auto& entry : entries.const_buffers) {
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const auto& config = launch_desc.const_buffer_config[entry.GetIndex()];
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const std::bitset<8> mask = launch_desc.const_buffer_enable_mask.Value();
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Tegra::Engines::ConstBufferInfo buffer;
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buffer.address = config.Address();
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buffer.size = config.size;
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buffer.enabled = mask[entry.GetIndex()];
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SetupConstBuffer(GL_COMPUTE_PROGRAM_PARAMETER_BUFFER_NV, binding++, buffer, entry);
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SetupConstBuffer(GL_COMPUTE_PROGRAM_PARAMETER_BUFFER_NV, binding, buffer, entry,
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use_unified, entry.GetIndex() * Maxwell::MaxConstBufferSize);
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++binding;
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}
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if (use_unified) {
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const GLuint index = static_cast<GLuint>(entries.global_memory_entries.size());
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glBindBufferRange(GL_SHADER_STORAGE_BUFFER, index, unified_uniform_buffer.handle, 0,
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NUM_CONST_BUFFERS_BYTES_PER_STAGE);
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}
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}
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void RasterizerOpenGL::SetupConstBuffer(GLenum stage, u32 binding,
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const Tegra::Engines::ConstBufferInfo& buffer,
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const ConstBufferEntry& entry) {
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const ConstBufferEntry& entry, bool use_unified,
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std::size_t unified_offset) {
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if (!buffer.enabled) {
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// Set values to zero to unbind buffers
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if (device.UseAssemblyShaders()) {
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@ -885,20 +916,29 @@ void RasterizerOpenGL::SetupConstBuffer(GLenum stage, u32 binding,
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// UBO alignment requirements.
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const std::size_t size = Common::AlignUp(GetConstBufferSize(buffer, entry), sizeof(GLvec4));
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const auto alignment = device.GetUniformBufferAlignment();
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auto [cbuf, offset] = buffer_cache.UploadMemory(buffer.address, size, alignment, false,
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device.HasFastBufferSubData());
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if (!device.UseAssemblyShaders()) {
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glBindBufferRange(GL_UNIFORM_BUFFER, binding, cbuf, offset, size);
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const bool fast_upload = !use_unified && device.HasFastBufferSubData();
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const std::size_t alignment = use_unified ? 4 : device.GetUniformBufferAlignment();
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const GPUVAddr gpu_addr = buffer.address;
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auto [cbuf, offset] = buffer_cache.UploadMemory(gpu_addr, size, alignment, false, fast_upload);
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if (device.UseAssemblyShaders()) {
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UNIMPLEMENTED_IF(use_unified);
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if (offset != 0) {
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const GLuint staging_cbuf = staging_cbufs[current_cbuf++];
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glCopyNamedBufferSubData(cbuf, staging_cbuf, offset, 0, size);
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cbuf = staging_cbuf;
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offset = 0;
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}
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glBindBufferRangeNV(stage, binding, cbuf, offset, size);
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return;
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}
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if (offset != 0) {
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const GLuint staging_cbuf = staging_cbufs[current_cbuf++];
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glCopyNamedBufferSubData(cbuf, staging_cbuf, offset, 0, size);
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cbuf = staging_cbuf;
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offset = 0;
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if (use_unified) {
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glCopyNamedBufferSubData(cbuf, unified_uniform_buffer.handle, offset, unified_offset, size);
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} else {
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glBindBufferRange(GL_UNIFORM_BUFFER, binding, cbuf, offset, size);
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}
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glBindBufferRangeNV(stage, binding, cbuf, offset, size);
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}
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void RasterizerOpenGL::SetupDrawGlobalMemory(std::size_t stage_index, const Shader& shader) {
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@ -107,7 +107,8 @@ private:
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/// Configures a constant buffer.
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void SetupConstBuffer(GLenum stage, u32 binding, const Tegra::Engines::ConstBufferInfo& buffer,
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const ConstBufferEntry& entry);
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const ConstBufferEntry& entry, bool use_unified,
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std::size_t unified_offset);
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/// Configures the current global memory entries to use for the draw command.
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void SetupDrawGlobalMemory(std::size_t stage_index, const Shader& shader);
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@ -253,6 +254,7 @@ private:
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Tegra::Engines::Maxwell3D::Regs::MaxShaderProgram;
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std::array<GLuint, NUM_CONSTANT_BUFFERS> staging_cbufs{};
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std::size_t current_cbuf = 0;
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OGLBuffer unified_uniform_buffer;
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/// Number of commands queued to the OpenGL driver. Reseted on flush.
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std::size_t num_queued_commands = 0;
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@ -241,8 +241,9 @@ Shader CachedShader::CreateStageFromMemory(const ShaderParameters& params,
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entry.bindless_samplers = registry->GetBindlessSamplers();
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params.disk_cache.SaveEntry(std::move(entry));
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return std::shared_ptr<CachedShader>(new CachedShader(
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params.cpu_addr, size_in_bytes, std::move(registry), MakeEntries(ir), std::move(program)));
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return std::shared_ptr<CachedShader>(
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new CachedShader(params.cpu_addr, size_in_bytes, std::move(registry),
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MakeEntries(params.device, ir, shader_type), std::move(program)));
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}
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Shader CachedShader::CreateKernelFromMemory(const ShaderParameters& params, ProgramCode code) {
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@ -265,8 +266,9 @@ Shader CachedShader::CreateKernelFromMemory(const ShaderParameters& params, Prog
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entry.bindless_samplers = registry->GetBindlessSamplers();
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params.disk_cache.SaveEntry(std::move(entry));
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return std::shared_ptr<CachedShader>(new CachedShader(
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params.cpu_addr, size_in_bytes, std::move(registry), MakeEntries(ir), std::move(program)));
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return std::shared_ptr<CachedShader>(
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new CachedShader(params.cpu_addr, size_in_bytes, std::move(registry),
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MakeEntries(params.device, ir, ShaderType::Compute), std::move(program)));
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}
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Shader CachedShader::CreateFromCache(const ShaderParameters& params,
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@ -348,7 +350,7 @@ void ShaderCacheOpenGL::LoadDiskCache(const std::atomic_bool& stop_loading,
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PrecompiledShader shader;
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shader.program = std::move(program);
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shader.registry = std::move(registry);
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shader.entries = MakeEntries(ir);
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shader.entries = MakeEntries(device, ir, entry.type);
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std::scoped_lock lock{mutex};
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if (callback) {
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@ -61,8 +61,8 @@ struct TextureDerivates {};
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using TextureArgument = std::pair<Type, Node>;
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using TextureIR = std::variant<TextureOffset, TextureDerivates, TextureArgument>;
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constexpr u32 MAX_CONSTBUFFER_ELEMENTS =
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static_cast<u32>(Maxwell::MaxConstBufferSize) / (4 * sizeof(float));
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constexpr u32 MAX_CONSTBUFFER_SCALARS = static_cast<u32>(Maxwell::MaxConstBufferSize) / sizeof(u32);
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constexpr u32 MAX_CONSTBUFFER_ELEMENTS = MAX_CONSTBUFFER_SCALARS / sizeof(u32);
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constexpr std::string_view CommonDeclarations = R"(#define ftoi floatBitsToInt
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#define ftou floatBitsToUint
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@ -402,6 +402,13 @@ std::string FlowStackTopName(MetaStackClass stack) {
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return fmt::format("{}_flow_stack_top", GetFlowStackPrefix(stack));
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}
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bool UseUnifiedUniforms(const Device& device, const ShaderIR& ir, ShaderType stage) {
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const u32 num_ubos = static_cast<u32>(ir.GetConstantBuffers().size());
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// We waste one UBO for emulation
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const u32 num_available_ubos = device.GetMaxUniformBuffers(stage) - 1;
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return num_ubos > num_available_ubos;
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}
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struct GenericVaryingDescription {
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std::string name;
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u8 first_element = 0;
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@ -412,8 +419,9 @@ class GLSLDecompiler final {
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public:
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explicit GLSLDecompiler(const Device& device, const ShaderIR& ir, const Registry& registry,
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ShaderType stage, std::string_view identifier, std::string_view suffix)
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: device{device}, ir{ir}, registry{registry}, stage{stage},
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identifier{identifier}, suffix{suffix}, header{ir.GetHeader()} {
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: device{device}, ir{ir}, registry{registry}, stage{stage}, identifier{identifier},
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suffix{suffix}, header{ir.GetHeader()}, use_unified_uniforms{
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UseUnifiedUniforms(device, ir, stage)} {
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if (stage != ShaderType::Compute) {
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transform_feedback = BuildTransformFeedback(registry.GetGraphicsInfo());
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}
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@ -834,12 +842,24 @@ private:
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}
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void DeclareConstantBuffers() {
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if (use_unified_uniforms) {
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const u32 binding = device.GetBaseBindings(stage).shader_storage_buffer +
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static_cast<u32>(ir.GetGlobalMemory().size());
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code.AddLine("layout (std430, binding = {}) readonly buffer UnifiedUniforms {{",
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binding);
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code.AddLine(" uint cbufs[];");
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code.AddLine("}};");
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code.AddNewLine();
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return;
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}
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u32 binding = device.GetBaseBindings(stage).uniform_buffer;
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for (const auto& buffers : ir.GetConstantBuffers()) {
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const auto index = buffers.first;
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for (const auto [index, info] : ir.GetConstantBuffers()) {
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const u32 num_elements = Common::AlignUp(info.GetSize(), 4) / 4;
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const u32 size = info.IsIndirect() ? MAX_CONSTBUFFER_ELEMENTS : num_elements;
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code.AddLine("layout (std140, binding = {}) uniform {} {{", binding++,
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GetConstBufferBlock(index));
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code.AddLine(" uvec4 {}[{}];", GetConstBuffer(index), MAX_CONSTBUFFER_ELEMENTS);
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code.AddLine(" uvec4 {}[{}];", GetConstBuffer(index), size);
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code.AddLine("}};");
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code.AddNewLine();
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}
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@ -1038,42 +1058,51 @@ private:
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if (const auto cbuf = std::get_if<CbufNode>(&*node)) {
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const Node offset = cbuf->GetOffset();
|
||||
const u32 base_unified_offset = cbuf->GetIndex() * MAX_CONSTBUFFER_SCALARS;
|
||||
|
||||
if (const auto immediate = std::get_if<ImmediateNode>(&*offset)) {
|
||||
// Direct access
|
||||
const u32 offset_imm = immediate->GetValue();
|
||||
ASSERT_MSG(offset_imm % 4 == 0, "Unaligned cbuf direct access");
|
||||
return {fmt::format("{}[{}][{}]", GetConstBuffer(cbuf->GetIndex()),
|
||||
offset_imm / (4 * 4), (offset_imm / 4) % 4),
|
||||
if (use_unified_uniforms) {
|
||||
return {fmt::format("cbufs[{}]", base_unified_offset + offset_imm / 4),
|
||||
Type::Uint};
|
||||
} else {
|
||||
return {fmt::format("{}[{}][{}]", GetConstBuffer(cbuf->GetIndex()),
|
||||
offset_imm / (4 * 4), (offset_imm / 4) % 4),
|
||||
Type::Uint};
|
||||
}
|
||||
}
|
||||
|
||||
// Indirect access
|
||||
if (use_unified_uniforms) {
|
||||
return {fmt::format("cbufs[{} + ({} >> 2)]", base_unified_offset,
|
||||
Visit(offset).AsUint()),
|
||||
Type::Uint};
|
||||
}
|
||||
|
||||
if (std::holds_alternative<OperationNode>(*offset)) {
|
||||
// Indirect access
|
||||
const std::string final_offset = code.GenerateTemporary();
|
||||
code.AddLine("uint {} = {} >> 2;", final_offset, Visit(offset).AsUint());
|
||||
const std::string final_offset = code.GenerateTemporary();
|
||||
code.AddLine("uint {} = {} >> 2;", final_offset, Visit(offset).AsUint());
|
||||
|
||||
if (!device.HasComponentIndexingBug()) {
|
||||
return {fmt::format("{}[{} >> 2][{} & 3]", GetConstBuffer(cbuf->GetIndex()),
|
||||
final_offset, final_offset),
|
||||
Type::Uint};
|
||||
}
|
||||
|
||||
// AMD's proprietary GLSL compiler emits ill code for variable component access.
|
||||
// To bypass this driver bug generate 4 ifs, one per each component.
|
||||
const std::string pack = code.GenerateTemporary();
|
||||
code.AddLine("uvec4 {} = {}[{} >> 2];", pack, GetConstBuffer(cbuf->GetIndex()),
|
||||
final_offset);
|
||||
|
||||
const std::string result = code.GenerateTemporary();
|
||||
code.AddLine("uint {};", result);
|
||||
for (u32 swizzle = 0; swizzle < 4; ++swizzle) {
|
||||
code.AddLine("if (({} & 3) == {}) {} = {}{};", final_offset, swizzle, result,
|
||||
pack, GetSwizzle(swizzle));
|
||||
}
|
||||
return {result, Type::Uint};
|
||||
if (!device.HasComponentIndexingBug()) {
|
||||
return {fmt::format("{}[{} >> 2][{} & 3]", GetConstBuffer(cbuf->GetIndex()),
|
||||
final_offset, final_offset),
|
||||
Type::Uint};
|
||||
}
|
||||
|
||||
UNREACHABLE_MSG("Unmanaged offset node type");
|
||||
// AMD's proprietary GLSL compiler emits ill code for variable component access.
|
||||
// To bypass this driver bug generate 4 ifs, one per each component.
|
||||
const std::string pack = code.GenerateTemporary();
|
||||
code.AddLine("uvec4 {} = {}[{} >> 2];", pack, GetConstBuffer(cbuf->GetIndex()),
|
||||
final_offset);
|
||||
|
||||
const std::string result = code.GenerateTemporary();
|
||||
code.AddLine("uint {};", result);
|
||||
for (u32 swizzle = 0; swizzle < 4; ++swizzle) {
|
||||
code.AddLine("if (({} & 3) == {}) {} = {}{};", final_offset, swizzle, result, pack,
|
||||
GetSwizzle(swizzle));
|
||||
}
|
||||
return {result, Type::Uint};
|
||||
}
|
||||
|
||||
if (const auto gmem = std::get_if<GmemNode>(&*node)) {
|
||||
@ -2710,6 +2739,7 @@ private:
|
||||
const std::string_view identifier;
|
||||
const std::string_view suffix;
|
||||
const Header header;
|
||||
const bool use_unified_uniforms;
|
||||
std::unordered_map<u8, VaryingTFB> transform_feedback;
|
||||
|
||||
ShaderWriter code;
|
||||
@ -2905,7 +2935,7 @@ void GLSLDecompiler::DecompileAST() {
|
||||
|
||||
} // Anonymous namespace
|
||||
|
||||
ShaderEntries MakeEntries(const VideoCommon::Shader::ShaderIR& ir) {
|
||||
ShaderEntries MakeEntries(const Device& device, const ShaderIR& ir, ShaderType stage) {
|
||||
ShaderEntries entries;
|
||||
for (const auto& cbuf : ir.GetConstantBuffers()) {
|
||||
entries.const_buffers.emplace_back(cbuf.second.GetMaxOffset(), cbuf.second.IsIndirect(),
|
||||
@ -2926,6 +2956,7 @@ ShaderEntries MakeEntries(const VideoCommon::Shader::ShaderIR& ir) {
|
||||
entries.clip_distances = (clip_distances[i] ? 1U : 0U) << i;
|
||||
}
|
||||
entries.shader_length = ir.GetLength();
|
||||
entries.use_unified_uniforms = UseUnifiedUniforms(device, ir, stage);
|
||||
return entries;
|
||||
}
|
||||
|
||||
|
@ -53,11 +53,13 @@ struct ShaderEntries {
|
||||
std::vector<GlobalMemoryEntry> global_memory_entries;
|
||||
std::vector<SamplerEntry> samplers;
|
||||
std::vector<ImageEntry> images;
|
||||
u32 clip_distances{};
|
||||
std::size_t shader_length{};
|
||||
u32 clip_distances{};
|
||||
bool use_unified_uniforms{};
|
||||
};
|
||||
|
||||
ShaderEntries MakeEntries(const VideoCommon::Shader::ShaderIR& ir);
|
||||
ShaderEntries MakeEntries(const Device& device, const VideoCommon::Shader::ShaderIR& ir,
|
||||
Tegra::Engines::ShaderType stage);
|
||||
|
||||
std::string DecompileShader(const Device& device, const VideoCommon::Shader::ShaderIR& ir,
|
||||
const VideoCommon::Shader::Registry& registry,
|
||||
|
Loading…
Reference in New Issue
Block a user