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Merge pull request #4344 from VolcaEM/c3
dmnt_cheat_vm: Implement opcode 0xC3 (ReadWriteStaticRegister)
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commit
5d95e62443
@ -190,6 +190,15 @@ void DmntCheatVm::LogOpcode(const CheatVmOpcode& opcode) {
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callbacks->CommandLog(
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fmt::format("Act[{:02X}]: {:d}", i, save_restore_regmask->should_operate[i]));
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}
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} else if (auto rw_static_reg = std::get_if<ReadWriteStaticRegisterOpcode>(&opcode.opcode)) {
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callbacks->CommandLog("Opcode: Read/Write Static Register");
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if (rw_static_reg->static_idx < NumReadableStaticRegisters) {
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callbacks->CommandLog("Op Type: ReadStaticRegister");
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} else {
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callbacks->CommandLog("Op Type: WriteStaticRegister");
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}
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callbacks->CommandLog(fmt::format("Reg Idx {:X}", rw_static_reg->idx));
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callbacks->CommandLog(fmt::format("Stc Idx {:X}", rw_static_reg->static_idx));
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} else if (auto debug_log = std::get_if<DebugLogOpcode>(&opcode.opcode)) {
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callbacks->CommandLog("Opcode: Debug Log");
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callbacks->CommandLog(fmt::format("Bit Width: {:X}", debug_log->bit_width));
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@ -544,6 +553,16 @@ bool DmntCheatVm::DecodeNextOpcode(CheatVmOpcode& out) {
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}
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opcode.opcode = save_restore_regmask;
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} break;
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case CheatVmOpcodeType::ReadWriteStaticRegister: {
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ReadWriteStaticRegisterOpcode rw_static_reg{};
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// C3000XXx
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// C3 = opcode 0xC3.
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// XX = static register index.
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// x = register index.
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rw_static_reg.static_idx = ((first_dword >> 4) & 0xFF);
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rw_static_reg.idx = (first_dword & 0xF);
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opcode.opcode = rw_static_reg;
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} break;
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case CheatVmOpcodeType::DebugLog: {
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DebugLogOpcode debug_log{};
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// FFFTIX##
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@ -667,6 +686,7 @@ void DmntCheatVm::ResetState() {
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registers.fill(0);
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saved_values.fill(0);
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loop_tops.fill(0);
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static_registers.fill(0);
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instruction_ptr = 0;
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condition_depth = 0;
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decode_success = true;
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@ -1153,6 +1173,15 @@ void DmntCheatVm::Execute(const CheatProcessMetadata& metadata) {
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}
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}
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}
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} else if (auto rw_static_reg =
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std::get_if<ReadWriteStaticRegisterOpcode>(&cur_opcode.opcode)) {
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if (rw_static_reg->static_idx < NumReadableStaticRegisters) {
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// Load a register with a static register.
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registers[rw_static_reg->idx] = static_registers[rw_static_reg->static_idx];
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} else {
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// Store a register to a static register.
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static_registers[rw_static_reg->static_idx] = registers[rw_static_reg->idx];
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}
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} else if (auto debug_log = std::get_if<DebugLogOpcode>(&cur_opcode.opcode)) {
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// Read value from memory.
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u64 log_value = 0;
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@ -56,6 +56,7 @@ enum class CheatVmOpcodeType : u32 {
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BeginRegisterConditionalBlock = 0xC0,
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SaveRestoreRegister = 0xC1,
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SaveRestoreRegisterMask = 0xC2,
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ReadWriteStaticRegister = 0xC3,
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// This is a meta entry, and not a real opcode.
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// This is to facilitate multi-nybble instruction decoding.
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@ -237,6 +238,11 @@ struct SaveRestoreRegisterMaskOpcode {
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std::array<bool, 0x10> should_operate{};
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};
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struct ReadWriteStaticRegisterOpcode {
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u32 static_idx{};
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u32 idx{};
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};
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struct DebugLogOpcode {
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u32 bit_width{};
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u32 log_id{};
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@ -259,7 +265,8 @@ struct CheatVmOpcode {
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PerformArithmeticStaticOpcode, BeginKeypressConditionalOpcode,
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PerformArithmeticRegisterOpcode, StoreRegisterToAddressOpcode,
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BeginRegisterConditionalOpcode, SaveRestoreRegisterOpcode,
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SaveRestoreRegisterMaskOpcode, DebugLogOpcode, UnrecognizedInstruction>
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SaveRestoreRegisterMaskOpcode, ReadWriteStaticRegisterOpcode, DebugLogOpcode,
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UnrecognizedInstruction>
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opcode{};
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};
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@ -281,6 +288,10 @@ public:
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static constexpr std::size_t MaximumProgramOpcodeCount = 0x400;
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static constexpr std::size_t NumRegisters = 0x10;
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static constexpr std::size_t NumReadableStaticRegisters = 0x80;
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static constexpr std::size_t NumWritableStaticRegisters = 0x80;
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static constexpr std::size_t NumStaticRegisters =
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NumReadableStaticRegisters + NumWritableStaticRegisters;
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explicit DmntCheatVm(std::unique_ptr<Callbacks> callbacks);
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~DmntCheatVm();
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@ -302,6 +313,7 @@ private:
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std::array<u32, MaximumProgramOpcodeCount> program{};
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std::array<u64, NumRegisters> registers{};
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std::array<u64, NumRegisters> saved_values{};
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std::array<u64, NumStaticRegisters> static_registers{};
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std::array<std::size_t, NumRegisters> loop_tops{};
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bool DecodeNextOpcode(CheatVmOpcode& out);
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