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shader: Stub VOTE.VTG
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@ -256,6 +256,13 @@ static U1 GetFlowTest(IREmitter& ir, FlowTest flow_test) {
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return ir.LogicalOr(ir.GetSFlag(), ir.GetZFlag());
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return ir.LogicalOr(ir.GetSFlag(), ir.GetZFlag());
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case FlowTest::RGT:
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case FlowTest::RGT:
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return ir.LogicalAnd(ir.LogicalNot(ir.GetSFlag()), ir.LogicalNot(ir.GetZFlag()));
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return ir.LogicalAnd(ir.LogicalNot(ir.GetSFlag()), ir.LogicalNot(ir.GetZFlag()));
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case FlowTest::CSM_TA:
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case FlowTest::CSM_TR:
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case FlowTest::CSM_MX:
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case FlowTest::FCSM_TA:
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case FlowTest::FCSM_TR:
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case FlowTest::FCSM_MX:
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return ir.Imm1(false);
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default:
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default:
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throw NotImplementedException("Flow test {}", flow_test);
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throw NotImplementedException("Flow test {}", flow_test);
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}
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}
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@ -95,6 +95,10 @@ enum class SpecialRegister : u64 {
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return ir.WorkgroupIdY();
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return ir.WorkgroupIdY();
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case SpecialRegister::SR_CTAID_Z:
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case SpecialRegister::SR_CTAID_Z:
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return ir.WorkgroupIdZ();
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return ir.WorkgroupIdZ();
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case SpecialRegister::SR_WSCALEFACTOR_XY:
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return ir.Imm32(Common::BitCast<u32>(1.0f));
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case SpecialRegister::SR_WSCALEFACTOR_Z:
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return ir.Imm32(Common::BitCast<u32>(1.0f));
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default:
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default:
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throw NotImplementedException("S2R special register {}", special_register);
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throw NotImplementedException("S2R special register {}", special_register);
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}
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}
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@ -329,10 +329,6 @@ void TranslatorVisitor::VADD(u64) {
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ThrowNotImplemented(Opcode::VADD);
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ThrowNotImplemented(Opcode::VADD);
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}
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}
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void TranslatorVisitor::VOTE_vtg(u64) {
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ThrowNotImplemented(Opcode::VOTE_vtg);
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}
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void TranslatorVisitor::VSET(u64) {
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void TranslatorVisitor::VSET(u64) {
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ThrowNotImplemented(Opcode::VSET);
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ThrowNotImplemented(Opcode::VSET);
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}
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}
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@ -49,4 +49,8 @@ void TranslatorVisitor::VOTE(u64 insn) {
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Vote(*this, insn);
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Vote(*this, insn);
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}
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}
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void TranslatorVisitor::VOTE_vtg(u64) {
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// Stub
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}
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} // namespace Shader::Maxwell
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} // namespace Shader::Maxwell
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