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https://github.com/yuzu-emu/yuzu.git
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VideoCore: Use union to index into Regs struct
Also remove some unused members.
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@ -49,19 +49,23 @@ MICROPROFILE_DEFINE(GPU_Drawing, "GPU", "Drawing", MP_RGB(50, 50, 240));
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static void WritePicaReg(u32 id, u32 value, u32 mask) {
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auto& regs = g_state.regs;
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if (id >= regs.NumIds())
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if (id >= Regs::NUM_REGS) {
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LOG_ERROR(HW_GPU,
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"Commandlist tried to write to invalid register 0x%03X (value: %08X, mask: %X)",
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id, value, mask);
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return;
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}
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// TODO: Figure out how register masking acts on e.g. vs.uniform_setup.set_value
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u32 old_value = regs[id];
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u32 old_value = regs.reg_array[id];
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const u32 write_mask = expand_bits_to_bytes[mask];
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regs[id] = (old_value & ~write_mask) | (value & write_mask);
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regs.reg_array[id] = (old_value & ~write_mask) | (value & write_mask);
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// Double check for is_pica_tracing to avoid call overhead
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if (DebugUtils::IsPicaTracing()) {
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DebugUtils::OnPicaRegWrite({(u16)id, (u16)mask, regs[id]});
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DebugUtils::OnPicaRegWrite({(u16)id, (u16)mask, regs.reg_array[id]});
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}
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if (g_debug_context)
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@ -45,46 +45,31 @@ namespace Pica {
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#endif // _MSC_VER
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struct Regs {
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INSERT_PADDING_WORDS(0x10);
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u32 trigger_irq;
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INSERT_PADDING_WORDS(0x2f);
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RasterizerRegs rasterizer;
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TexturingRegs texturing;
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FramebufferRegs framebuffer;
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LightingRegs lighting;
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PipelineRegs pipeline;
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ShaderRegs gs;
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ShaderRegs vs;
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INSERT_PADDING_WORDS(0x20);
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static constexpr size_t NUM_REGS = 0x300;
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union {
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struct {
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INSERT_PADDING_WORDS(0x10);
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u32 trigger_irq;
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INSERT_PADDING_WORDS(0x2f);
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RasterizerRegs rasterizer;
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TexturingRegs texturing;
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FramebufferRegs framebuffer;
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LightingRegs lighting;
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PipelineRegs pipeline;
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ShaderRegs gs;
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ShaderRegs vs;
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INSERT_PADDING_WORDS(0x20);
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};
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std::array<u32, NUM_REGS> reg_array;
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};
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// Map register indices to names readable by humans
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// Used for debugging purposes, so performance is not an issue here
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static std::string GetCommandName(int index);
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static constexpr size_t NumIds() {
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return sizeof(Regs) / sizeof(u32);
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}
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const u32& operator[](int index) const {
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const u32* content = reinterpret_cast<const u32*>(this);
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return content[index];
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}
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u32& operator[](int index) {
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u32* content = reinterpret_cast<u32*>(this);
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return content[index];
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}
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private:
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/*
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* Most physical addresses which Pica registers refer to are 8-byte aligned.
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* This function should be used to get the address from a raw register value.
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*/
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static inline u32 DecodeAddressRegister(u32 register_value) {
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return register_value * 8;
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}
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};
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static_assert(sizeof(Regs) == Regs::NUM_REGS * sizeof(u32), "Regs struct has wrong size");
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// TODO: MSVC does not support using offsetof() on non-static data members even though this
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// is technically allowed since C++11. This macro should be enabled once MSVC adds
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// support for that.
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@ -154,11 +139,4 @@ ASSERT_REG_POSITION(vs, 0x2b0);
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#undef ASSERT_REG_POSITION
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#endif // !defined(_MSC_VER)
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// The total number of registers is chosen arbitrarily, but let's make sure it's not some odd value
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// anyway.
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static_assert(sizeof(Regs) <= 0x300 * sizeof(u32),
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"Register set structure larger than it should be");
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static_assert(sizeof(Regs) >= 0x300 * sizeof(u32),
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"Register set structure smaller than it should be");
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} // namespace Pica
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