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gl_shader_decompiler: Implement LOP32I LogicOperation PassB.
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parent
17f3590d59
commit
61f9d9c4ab
@ -930,20 +930,26 @@ private:
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if (instr.alu.lop.invert_b)
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imm = ~imm;
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std::string op_b = std::to_string(imm);
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switch (instr.alu.lop.operation) {
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case Tegra::Shader::LogicOperation::And: {
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regs.SetRegisterToInteger(instr.gpr0, true, 0,
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'(' + op_a + " & " + std::to_string(imm) + ')', 1, 1);
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regs.SetRegisterToInteger(instr.gpr0, true, 0, '(' + op_a + " & " + op_b + ')',
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1, 1);
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break;
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}
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case Tegra::Shader::LogicOperation::Or: {
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regs.SetRegisterToInteger(instr.gpr0, true, 0,
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'(' + op_a + " | " + std::to_string(imm) + ')', 1, 1);
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regs.SetRegisterToInteger(instr.gpr0, true, 0, '(' + op_a + " | " + op_b + ')',
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1, 1);
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break;
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}
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case Tegra::Shader::LogicOperation::Xor: {
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regs.SetRegisterToInteger(instr.gpr0, true, 0,
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'(' + op_a + " ^ " + std::to_string(imm) + ')', 1, 1);
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regs.SetRegisterToInteger(instr.gpr0, true, 0, '(' + op_a + " ^ " + op_b + ')',
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1, 1);
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break;
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}
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case Tegra::Shader::LogicOperation::PassB: {
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regs.SetRegisterToInteger(instr.gpr0, true, 0, op_b, 1, 1);
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break;
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}
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default:
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