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Merge pull request #7800 from ameerj/spirv-int64-storage
spirv_atomic: Define U32x2 storage buffers for 64-bit storage atomics
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commit
64a68ccbb4
@ -74,7 +74,7 @@ Id StorageAtomicU64(EmitContext& ctx, const IR::Value& binding, const IR::Value&
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const auto [scope, semantics]{AtomicArgs(ctx)};
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return (ctx.*atomic_func)(ctx.U64, pointer, scope, semantics, value);
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}
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LOG_ERROR(Shader_SPIRV, "Int64 atomics not supported, fallback to non-atomic");
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LOG_WARNING(Shader_SPIRV, "Int64 atomics not supported, fallback to non-atomic");
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const Id pointer{StoragePointer(ctx, ctx.storage_types.U32x2, &StorageDefinitions::U32x2,
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binding, offset, sizeof(u32[2]))};
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const Id original_value{ctx.OpBitcast(ctx.U64, ctx.OpLoad(ctx.U32[2], pointer))};
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@ -267,7 +267,7 @@ Id EmitStorageAtomicExchange64(EmitContext& ctx, const IR::Value& binding, const
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const auto [scope, semantics]{AtomicArgs(ctx)};
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return ctx.OpAtomicExchange(ctx.U64, pointer, scope, semantics, value);
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}
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LOG_ERROR(Shader_SPIRV, "Int64 atomics not supported, fallback to non-atomic");
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LOG_WARNING(Shader_SPIRV, "Int64 atomics not supported, fallback to non-atomic");
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const Id pointer{StoragePointer(ctx, ctx.storage_types.U32x2, &StorageDefinitions::U32x2,
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binding, offset, sizeof(u32[2]))};
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const Id original{ctx.OpBitcast(ctx.U64, ctx.OpLoad(ctx.U32[2], pointer))};
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@ -688,7 +688,7 @@ void VisitUsages(Info& info, IR::Inst& inst) {
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case IR::Opcode::StorageAtomicAnd64:
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case IR::Opcode::StorageAtomicOr64:
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case IR::Opcode::StorageAtomicXor64:
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info.used_storage_buffer_types |= IR::Type::U64;
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info.used_storage_buffer_types |= IR::Type::U64 | IR::Type::U32x2;
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info.uses_int64_bit_atomics = true;
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break;
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case IR::Opcode::BindlessImageAtomicIAdd32:
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