mirror of
https://github.com/yuzu-emu/yuzu.git
synced 2024-08-20 13:43:22 +02:00
Merge pull request #2409 from ReinUsesLisp/half-floats
shader_ir/decode: Miscellaneous fixes to half-float decompilation
This commit is contained in:
commit
650d9b1044
@ -119,14 +119,10 @@ std::string GetTopologyName(Tegra::Shader::OutputTopology topology) {
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/// Returns true if an object has to be treated as precise
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bool IsPrecise(Operation operand) {
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const auto& meta = operand.GetMeta();
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const auto& meta{operand.GetMeta()};
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if (const auto arithmetic = std::get_if<MetaArithmetic>(&meta)) {
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return arithmetic->precise;
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}
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if (const auto half_arithmetic = std::get_if<MetaHalfArithmetic>(&meta)) {
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return half_arithmetic->precise;
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}
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return false;
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}
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@ -627,28 +623,7 @@ private:
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}
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std::string VisitOperand(Operation operation, std::size_t operand_index, Type type) {
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std::string value = VisitOperand(operation, operand_index);
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switch (type) {
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case Type::HalfFloat: {
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const auto half_meta = std::get_if<MetaHalfArithmetic>(&operation.GetMeta());
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if (!half_meta) {
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value = "toHalf2(" + value + ')';
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}
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switch (half_meta->types.at(operand_index)) {
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case Tegra::Shader::HalfType::H0_H1:
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return "toHalf2(" + value + ')';
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case Tegra::Shader::HalfType::F32:
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return "vec2(" + value + ')';
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case Tegra::Shader::HalfType::H0_H0:
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return "vec2(toHalf2(" + value + ")[0])";
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case Tegra::Shader::HalfType::H1_H1:
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return "vec2(toHalf2(" + value + ")[1])";
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}
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}
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default:
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return CastOperand(value, type);
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}
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return CastOperand(VisitOperand(operation, operand_index), type);
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}
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std::string CastOperand(const std::string& value, Type type) const {
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@ -662,9 +637,7 @@ private:
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case Type::Uint:
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return "ftou(" + value + ')';
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case Type::HalfFloat:
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// Can't be handled as a stand-alone value
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UNREACHABLE();
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return value;
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return "toHalf2(" + value + ')';
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}
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UNREACHABLE();
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return value;
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@ -1083,13 +1056,40 @@ private:
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return BitwiseCastResult(value, Type::HalfFloat);
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}
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std::string HClamp(Operation operation) {
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const std::string value = VisitOperand(operation, 0, Type::HalfFloat);
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const std::string min = VisitOperand(operation, 1, Type::Float);
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const std::string max = VisitOperand(operation, 2, Type::Float);
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const std::string clamped = "clamp(" + value + ", vec2(" + min + "), vec2(" + max + "))";
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return ApplyPrecise(operation, BitwiseCastResult(clamped, Type::HalfFloat));
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}
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std::string HUnpack(Operation operation) {
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const std::string operand{VisitOperand(operation, 0, Type::HalfFloat)};
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const auto value = [&]() -> std::string {
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switch (std::get<Tegra::Shader::HalfType>(operation.GetMeta())) {
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case Tegra::Shader::HalfType::H0_H1:
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return operand;
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case Tegra::Shader::HalfType::F32:
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return "vec2(fromHalf2(" + operand + "))";
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case Tegra::Shader::HalfType::H0_H0:
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return "vec2(" + operand + "[0])";
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case Tegra::Shader::HalfType::H1_H1:
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return "vec2(" + operand + "[1])";
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}
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UNREACHABLE();
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return "0";
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}();
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return "fromHalf2(" + value + ')';
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}
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std::string HMergeF32(Operation operation) {
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return "float(toHalf2(" + Visit(operation[0]) + ")[0])";
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}
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std::string HMergeH0(Operation operation) {
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return "fromHalf2(vec2(toHalf2(" + Visit(operation[0]) + ")[1], toHalf2(" +
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Visit(operation[1]) + ")[0]))";
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return "fromHalf2(vec2(toHalf2(" + Visit(operation[1]) + ")[0], toHalf2(" +
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Visit(operation[0]) + ")[1]))";
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}
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std::string HMergeH1(Operation operation) {
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@ -1189,34 +1189,46 @@ private:
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return GenerateUnary(operation, "any", Type::Bool, Type::Bool2);
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}
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template <bool with_nan>
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std::string GenerateHalfComparison(Operation operation, std::string compare_op) {
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std::string comparison{GenerateBinaryCall(operation, compare_op, Type::Bool2,
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Type::HalfFloat, Type::HalfFloat)};
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if constexpr (!with_nan) {
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return comparison;
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}
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return "halfFloatNanComparison(" + comparison + ", " +
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VisitOperand(operation, 0, Type::HalfFloat) + ", " +
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VisitOperand(operation, 1, Type::HalfFloat) + ')';
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}
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template <bool with_nan>
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std::string Logical2HLessThan(Operation operation) {
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return GenerateBinaryCall(operation, "lessThan", Type::Bool2, Type::HalfFloat,
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Type::HalfFloat);
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return GenerateHalfComparison<with_nan>(operation, "lessThan");
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}
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template <bool with_nan>
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std::string Logical2HEqual(Operation operation) {
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return GenerateBinaryCall(operation, "equal", Type::Bool2, Type::HalfFloat,
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Type::HalfFloat);
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return GenerateHalfComparison<with_nan>(operation, "equal");
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}
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template <bool with_nan>
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std::string Logical2HLessEqual(Operation operation) {
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return GenerateBinaryCall(operation, "lessThanEqual", Type::Bool2, Type::HalfFloat,
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Type::HalfFloat);
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return GenerateHalfComparison<with_nan>(operation, "lessThanEqual");
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}
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template <bool with_nan>
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std::string Logical2HGreaterThan(Operation operation) {
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return GenerateBinaryCall(operation, "greaterThan", Type::Bool2, Type::HalfFloat,
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Type::HalfFloat);
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return GenerateHalfComparison<with_nan>(operation, "greaterThan");
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}
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template <bool with_nan>
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std::string Logical2HNotEqual(Operation operation) {
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return GenerateBinaryCall(operation, "notEqual", Type::Bool2, Type::HalfFloat,
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Type::HalfFloat);
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return GenerateHalfComparison<with_nan>(operation, "notEqual");
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}
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template <bool with_nan>
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std::string Logical2HGreaterEqual(Operation operation) {
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return GenerateBinaryCall(operation, "greaterThanEqual", Type::Bool2, Type::HalfFloat,
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Type::HalfFloat);
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return GenerateHalfComparison<with_nan>(operation, "greaterThanEqual");
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}
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std::string Texture(Operation operation) {
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@ -1505,6 +1517,8 @@ private:
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&GLSLDecompiler::Fma<Type::HalfFloat>,
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&GLSLDecompiler::Absolute<Type::HalfFloat>,
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&GLSLDecompiler::HNegate,
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&GLSLDecompiler::HClamp,
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&GLSLDecompiler::HUnpack,
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&GLSLDecompiler::HMergeF32,
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&GLSLDecompiler::HMergeH0,
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&GLSLDecompiler::HMergeH1,
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@ -1541,12 +1555,18 @@ private:
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&GLSLDecompiler::LogicalNotEqual<Type::Uint>,
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&GLSLDecompiler::LogicalGreaterEqual<Type::Uint>,
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&GLSLDecompiler::Logical2HLessThan,
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&GLSLDecompiler::Logical2HEqual,
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&GLSLDecompiler::Logical2HLessEqual,
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&GLSLDecompiler::Logical2HGreaterThan,
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&GLSLDecompiler::Logical2HNotEqual,
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&GLSLDecompiler::Logical2HGreaterEqual,
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&GLSLDecompiler::Logical2HLessThan<false>,
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&GLSLDecompiler::Logical2HEqual<false>,
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&GLSLDecompiler::Logical2HLessEqual<false>,
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&GLSLDecompiler::Logical2HGreaterThan<false>,
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&GLSLDecompiler::Logical2HNotEqual<false>,
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&GLSLDecompiler::Logical2HGreaterEqual<false>,
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&GLSLDecompiler::Logical2HLessThan<true>,
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&GLSLDecompiler::Logical2HEqual<true>,
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&GLSLDecompiler::Logical2HLessEqual<true>,
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&GLSLDecompiler::Logical2HGreaterThan<true>,
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&GLSLDecompiler::Logical2HNotEqual<true>,
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&GLSLDecompiler::Logical2HGreaterEqual<true>,
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&GLSLDecompiler::Texture,
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&GLSLDecompiler::TextureLod,
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@ -1647,6 +1667,12 @@ std::string GetCommonDeclarations() {
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"}\n\n"
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"vec2 toHalf2(float value) {\n"
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" return unpackHalf2x16(ftou(value));\n"
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"}\n\n"
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"bvec2 halfFloatNanComparison(bvec2 comparison, vec2 pair1, vec2 pair2) {\n"
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" bvec2 is_nan1 = isnan(pair1);\n"
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" bvec2 is_nan2 = isnan(pair2);\n"
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" return bvec2(comparison.x || is_nan1.x || is_nan2.x, comparison.y || is_nan1.y || "
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"is_nan2.y);\n"
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"}\n";
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}
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@ -76,14 +76,10 @@ constexpr u32 GetGenericAttributeLocation(Attribute::Index attribute) {
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/// Returns true if an object has to be treated as precise
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bool IsPrecise(Operation operand) {
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const auto& meta = operand.GetMeta();
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const auto& meta{operand.GetMeta()};
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if (std::holds_alternative<MetaArithmetic>(meta)) {
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return std::get<MetaArithmetic>(meta).precise;
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}
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if (std::holds_alternative<MetaHalfArithmetic>(meta)) {
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return std::get<MetaHalfArithmetic>(meta).precise;
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}
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return false;
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}
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@ -746,6 +742,16 @@ private:
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return {};
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}
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Id HClamp(Operation operation) {
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UNIMPLEMENTED();
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return {};
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}
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Id HUnpack(Operation operation) {
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UNIMPLEMENTED();
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return {};
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}
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Id HMergeF32(Operation operation) {
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UNIMPLEMENTED();
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return {};
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@ -1218,6 +1224,8 @@ private:
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&SPIRVDecompiler::Ternary<&Module::OpFma, Type::HalfFloat>,
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&SPIRVDecompiler::Unary<&Module::OpFAbs, Type::HalfFloat>,
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&SPIRVDecompiler::HNegate,
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&SPIRVDecompiler::HClamp,
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&SPIRVDecompiler::HUnpack,
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&SPIRVDecompiler::HMergeF32,
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&SPIRVDecompiler::HMergeH0,
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&SPIRVDecompiler::HMergeH1,
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@ -1254,6 +1262,13 @@ private:
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&SPIRVDecompiler::Binary<&Module::OpINotEqual, Type::Bool, Type::Uint>,
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&SPIRVDecompiler::Binary<&Module::OpUGreaterThanEqual, Type::Bool, Type::Uint>,
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&SPIRVDecompiler::Binary<&Module::OpFOrdLessThan, Type::Bool, Type::HalfFloat>,
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&SPIRVDecompiler::Binary<&Module::OpFOrdEqual, Type::Bool, Type::HalfFloat>,
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&SPIRVDecompiler::Binary<&Module::OpFOrdLessThanEqual, Type::Bool, Type::HalfFloat>,
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&SPIRVDecompiler::Binary<&Module::OpFOrdGreaterThan, Type::Bool, Type::HalfFloat>,
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&SPIRVDecompiler::Binary<&Module::OpFOrdNotEqual, Type::Bool, Type::HalfFloat>,
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&SPIRVDecompiler::Binary<&Module::OpFOrdGreaterThanEqual, Type::Bool, Type::HalfFloat>,
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// TODO(Rodrigo): Should these use the OpFUnord* variants?
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&SPIRVDecompiler::Binary<&Module::OpFOrdLessThan, Type::Bool, Type::HalfFloat>,
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&SPIRVDecompiler::Binary<&Module::OpFOrdEqual, Type::Bool, Type::HalfFloat>,
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&SPIRVDecompiler::Binary<&Module::OpFOrdLessThanEqual, Type::Bool, Type::HalfFloat>,
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@ -18,7 +18,9 @@ u32 ShaderIR::DecodeArithmeticHalf(NodeBlock& bb, u32 pc) {
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if (opcode->get().GetId() == OpCode::Id::HADD2_C ||
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opcode->get().GetId() == OpCode::Id::HADD2_R) {
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UNIMPLEMENTED_IF(instr.alu_half.ftz != 0);
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if (instr.alu_half.ftz != 0) {
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LOG_WARNING(HW_GPU, "{} FTZ not implemented", opcode->get().GetName());
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}
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}
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UNIMPLEMENTED_IF_MSG(instr.alu_half.saturate != 0, "Half float saturation not implemented");
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@ -27,9 +29,8 @@ u32 ShaderIR::DecodeArithmeticHalf(NodeBlock& bb, u32 pc) {
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const bool negate_b =
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opcode->get().GetId() != OpCode::Id::HMUL2_C && instr.alu_half.negate_b != 0;
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const Node op_a = GetOperandAbsNegHalf(GetRegister(instr.gpr8), instr.alu_half.abs_a, negate_a);
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// instr.alu_half.type_a
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Node op_a = UnpackHalfFloat(GetRegister(instr.gpr8), instr.alu_half.type_a);
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op_a = GetOperandAbsNegHalf(op_a, instr.alu_half.abs_a, negate_a);
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Node op_b = [&]() {
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switch (opcode->get().GetId()) {
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@ -44,17 +45,17 @@ u32 ShaderIR::DecodeArithmeticHalf(NodeBlock& bb, u32 pc) {
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return Immediate(0);
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}
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}();
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op_b = UnpackHalfFloat(op_b, instr.alu_half.type_b);
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op_b = GetOperandAbsNegHalf(op_b, instr.alu_half.abs_b, negate_b);
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Node value = [&]() {
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MetaHalfArithmetic meta{true, {instr.alu_half_imm.type_a, instr.alu_half.type_b}};
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switch (opcode->get().GetId()) {
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case OpCode::Id::HADD2_C:
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case OpCode::Id::HADD2_R:
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return Operation(OperationCode::HAdd, meta, op_a, op_b);
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return Operation(OperationCode::HAdd, PRECISE, op_a, op_b);
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case OpCode::Id::HMUL2_C:
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case OpCode::Id::HMUL2_R:
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return Operation(OperationCode::HMul, meta, op_a, op_b);
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return Operation(OperationCode::HMul, PRECISE, op_a, op_b);
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default:
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UNIMPLEMENTED_MSG("Unhandled half float instruction: {}", opcode->get().GetName());
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return Immediate(0);
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@ -17,34 +17,33 @@ u32 ShaderIR::DecodeArithmeticHalfImmediate(NodeBlock& bb, u32 pc) {
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const auto opcode = OpCode::Decode(instr);
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if (opcode->get().GetId() == OpCode::Id::HADD2_IMM) {
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UNIMPLEMENTED_IF(instr.alu_half_imm.ftz != 0);
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if (instr.alu_half_imm.ftz != 0) {
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LOG_WARNING(HW_GPU, "{} FTZ not implemented", opcode->get().GetName());
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}
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} else {
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UNIMPLEMENTED_IF(instr.alu_half_imm.precision != Tegra::Shader::HalfPrecision::None);
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}
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UNIMPLEMENTED_IF_MSG(instr.alu_half_imm.saturate != 0,
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"Half float immediate saturation not implemented");
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Node op_a = GetRegister(instr.gpr8);
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Node op_a = UnpackHalfFloat(GetRegister(instr.gpr8), instr.alu_half_imm.type_a);
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op_a = GetOperandAbsNegHalf(op_a, instr.alu_half_imm.abs_a, instr.alu_half_imm.negate_a);
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const Node op_b = UnpackHalfImmediate(instr, true);
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Node value = [&]() {
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MetaHalfArithmetic meta{true, {instr.alu_half_imm.type_a}};
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switch (opcode->get().GetId()) {
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case OpCode::Id::HADD2_IMM:
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return Operation(OperationCode::HAdd, meta, op_a, op_b);
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return Operation(OperationCode::HAdd, PRECISE, op_a, op_b);
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case OpCode::Id::HMUL2_IMM:
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return Operation(OperationCode::HMul, meta, op_a, op_b);
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return Operation(OperationCode::HMul, PRECISE, op_a, op_b);
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default:
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UNREACHABLE();
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return Immediate(0);
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}
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}();
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value = GetSaturatedHalfFloat(value, instr.alu_half_imm.saturate);
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value = HalfMerge(GetRegister(instr.gpr0), value, instr.alu_half_imm.merge);
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SetRegister(bb, instr.gpr0, value);
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return pc;
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}
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@ -18,11 +18,13 @@ u32 ShaderIR::DecodeHalfSet(NodeBlock& bb, u32 pc) {
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const Instruction instr = {program_code[pc]};
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const auto opcode = OpCode::Decode(instr);
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UNIMPLEMENTED_IF(instr.hset2.ftz != 0);
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if (instr.hset2.ftz != 0) {
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LOG_WARNING(HW_GPU, "{} FTZ not implemented", opcode->get().GetName());
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}
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Node op_a = UnpackHalfFloat(GetRegister(instr.gpr8), instr.hset2.type_a);
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op_a = GetOperandAbsNegHalf(op_a, instr.hset2.abs_a, instr.hset2.negate_a);
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// instr.hset2.type_a
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// instr.hset2.type_b
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Node op_a = GetRegister(instr.gpr8);
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Node op_b = [&]() {
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switch (opcode->get().GetId()) {
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case OpCode::Id::HSET2_R:
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@ -32,14 +34,12 @@ u32 ShaderIR::DecodeHalfSet(NodeBlock& bb, u32 pc) {
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return Immediate(0);
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}
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}();
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op_a = GetOperandAbsNegHalf(op_a, instr.hset2.abs_a, instr.hset2.negate_a);
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op_b = UnpackHalfFloat(op_b, instr.hset2.type_b);
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op_b = GetOperandAbsNegHalf(op_b, instr.hset2.abs_b, instr.hset2.negate_b);
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const Node second_pred = GetPredicate(instr.hset2.pred39, instr.hset2.neg_pred);
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MetaHalfArithmetic meta{false, {instr.hset2.type_a, instr.hset2.type_b}};
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const Node comparison_pair = GetPredicateComparisonHalf(instr.hset2.cond, meta, op_a, op_b);
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const Node comparison_pair = GetPredicateComparisonHalf(instr.hset2.cond, op_a, op_b);
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const OperationCode combiner = GetPredicateCombiner(instr.hset2.op);
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@ -19,10 +19,10 @@ u32 ShaderIR::DecodeHalfSetPredicate(NodeBlock& bb, u32 pc) {
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UNIMPLEMENTED_IF(instr.hsetp2.ftz != 0);
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Node op_a = GetRegister(instr.gpr8);
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Node op_a = UnpackHalfFloat(GetRegister(instr.gpr8), instr.hsetp2.type_a);
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op_a = GetOperandAbsNegHalf(op_a, instr.hsetp2.abs_a, instr.hsetp2.negate_a);
|
||||
|
||||
const Node op_b = [&]() {
|
||||
Node op_b = [&]() {
|
||||
switch (opcode->get().GetId()) {
|
||||
case OpCode::Id::HSETP2_R:
|
||||
return GetOperandAbsNegHalf(GetRegister(instr.gpr20), instr.hsetp2.abs_a,
|
||||
@ -32,6 +32,7 @@ u32 ShaderIR::DecodeHalfSetPredicate(NodeBlock& bb, u32 pc) {
|
||||
return Immediate(0);
|
||||
}
|
||||
}();
|
||||
op_b = UnpackHalfFloat(op_b, instr.hsetp2.type_b);
|
||||
|
||||
// We can't use the constant predicate as destination.
|
||||
ASSERT(instr.hsetp2.pred3 != static_cast<u64>(Pred::UnusedIndex));
|
||||
@ -42,8 +43,7 @@ u32 ShaderIR::DecodeHalfSetPredicate(NodeBlock& bb, u32 pc) {
|
||||
const OperationCode pair_combiner =
|
||||
instr.hsetp2.h_and ? OperationCode::LogicalAll2 : OperationCode::LogicalAny2;
|
||||
|
||||
MetaHalfArithmetic meta = {false, {instr.hsetp2.type_a, instr.hsetp2.type_b}};
|
||||
const Node comparison = GetPredicateComparisonHalf(instr.hsetp2.cond, meta, op_a, op_b);
|
||||
const Node comparison = GetPredicateComparisonHalf(instr.hsetp2.cond, op_a, op_b);
|
||||
const Node first_pred = Operation(pair_combiner, comparison);
|
||||
|
||||
// Set the primary predicate to the result of Predicate OP SecondPredicate
|
||||
|
@ -27,10 +27,6 @@ u32 ShaderIR::DecodeHfma2(NodeBlock& bb, u32 pc) {
|
||||
}
|
||||
|
||||
constexpr auto identity = HalfType::H0_H1;
|
||||
|
||||
const HalfType type_a = instr.hfma2.type_a;
|
||||
const Node op_a = GetRegister(instr.gpr8);
|
||||
|
||||
bool neg_b{}, neg_c{};
|
||||
auto [saturate, type_b, op_b, type_c,
|
||||
op_c] = [&]() -> std::tuple<bool, HalfType, Node, HalfType, Node> {
|
||||
@ -62,11 +58,11 @@ u32 ShaderIR::DecodeHfma2(NodeBlock& bb, u32 pc) {
|
||||
}();
|
||||
UNIMPLEMENTED_IF_MSG(saturate, "HFMA2 saturation is not implemented");
|
||||
|
||||
op_b = GetOperandAbsNegHalf(op_b, false, neg_b);
|
||||
op_c = GetOperandAbsNegHalf(op_c, false, neg_c);
|
||||
const Node op_a = UnpackHalfFloat(GetRegister(instr.gpr8), instr.hfma2.type_a);
|
||||
op_b = GetOperandAbsNegHalf(UnpackHalfFloat(op_b, type_b), false, neg_b);
|
||||
op_c = GetOperandAbsNegHalf(UnpackHalfFloat(op_c, type_c), false, neg_c);
|
||||
|
||||
MetaHalfArithmetic meta{true, {type_a, type_b, type_c}};
|
||||
Node value = Operation(OperationCode::HFma, meta, op_a, op_b, op_c);
|
||||
Node value = Operation(OperationCode::HFma, PRECISE, op_a, op_b, op_c);
|
||||
value = HalfMerge(GetRegister(instr.gpr0), value, instr.hfma2.merge);
|
||||
|
||||
SetRegister(bb, instr.gpr0, value);
|
||||
|
@ -189,7 +189,11 @@ Node ShaderIR::UnpackHalfImmediate(Instruction instr, bool has_negation) {
|
||||
const Node first_negate = GetPredicate(instr.half_imm.first_negate != 0);
|
||||
const Node second_negate = GetPredicate(instr.half_imm.second_negate != 0);
|
||||
|
||||
return Operation(OperationCode::HNegate, HALF_NO_PRECISE, value, first_negate, second_negate);
|
||||
return Operation(OperationCode::HNegate, NO_PRECISE, value, first_negate, second_negate);
|
||||
}
|
||||
|
||||
Node ShaderIR::UnpackHalfFloat(Node value, Tegra::Shader::HalfType type) {
|
||||
return Operation(OperationCode::HUnpack, type, value);
|
||||
}
|
||||
|
||||
Node ShaderIR::HalfMerge(Node dest, Node src, Tegra::Shader::HalfMerge merge) {
|
||||
@ -209,17 +213,26 @@ Node ShaderIR::HalfMerge(Node dest, Node src, Tegra::Shader::HalfMerge merge) {
|
||||
|
||||
Node ShaderIR::GetOperandAbsNegHalf(Node value, bool absolute, bool negate) {
|
||||
if (absolute) {
|
||||
value = Operation(OperationCode::HAbsolute, HALF_NO_PRECISE, value);
|
||||
value = Operation(OperationCode::HAbsolute, NO_PRECISE, value);
|
||||
}
|
||||
if (negate) {
|
||||
value = Operation(OperationCode::HNegate, HALF_NO_PRECISE, value, GetPredicate(true),
|
||||
value = Operation(OperationCode::HNegate, NO_PRECISE, value, GetPredicate(true),
|
||||
GetPredicate(true));
|
||||
}
|
||||
return value;
|
||||
}
|
||||
|
||||
Node ShaderIR::GetSaturatedHalfFloat(Node value, bool saturate) {
|
||||
if (!saturate) {
|
||||
return value;
|
||||
}
|
||||
const Node positive_zero = Immediate(std::copysignf(0, 1));
|
||||
const Node positive_one = Immediate(1.0f);
|
||||
return Operation(OperationCode::HClamp, NO_PRECISE, value, positive_zero, positive_one);
|
||||
}
|
||||
|
||||
Node ShaderIR::GetPredicateComparisonFloat(PredCondition condition, Node op_a, Node op_b) {
|
||||
static const std::unordered_map<PredCondition, OperationCode> PredicateComparisonTable = {
|
||||
const std::unordered_map<PredCondition, OperationCode> PredicateComparisonTable = {
|
||||
{PredCondition::LessThan, OperationCode::LogicalFLessThan},
|
||||
{PredCondition::Equal, OperationCode::LogicalFEqual},
|
||||
{PredCondition::LessEqual, OperationCode::LogicalFLessEqual},
|
||||
@ -255,7 +268,7 @@ Node ShaderIR::GetPredicateComparisonFloat(PredCondition condition, Node op_a, N
|
||||
|
||||
Node ShaderIR::GetPredicateComparisonInteger(PredCondition condition, bool is_signed, Node op_a,
|
||||
Node op_b) {
|
||||
static const std::unordered_map<PredCondition, OperationCode> PredicateComparisonTable = {
|
||||
const std::unordered_map<PredCondition, OperationCode> PredicateComparisonTable = {
|
||||
{PredCondition::LessThan, OperationCode::LogicalILessThan},
|
||||
{PredCondition::Equal, OperationCode::LogicalIEqual},
|
||||
{PredCondition::LessEqual, OperationCode::LogicalILessEqual},
|
||||
@ -283,40 +296,32 @@ Node ShaderIR::GetPredicateComparisonInteger(PredCondition condition, bool is_si
|
||||
return predicate;
|
||||
}
|
||||
|
||||
Node ShaderIR::GetPredicateComparisonHalf(Tegra::Shader::PredCondition condition,
|
||||
const MetaHalfArithmetic& meta, Node op_a, Node op_b) {
|
||||
|
||||
UNIMPLEMENTED_IF_MSG(condition == PredCondition::LessThanWithNan ||
|
||||
condition == PredCondition::NotEqualWithNan ||
|
||||
condition == PredCondition::LessEqualWithNan ||
|
||||
condition == PredCondition::GreaterThanWithNan ||
|
||||
condition == PredCondition::GreaterEqualWithNan,
|
||||
"Unimplemented NaN comparison for half floats");
|
||||
|
||||
static const std::unordered_map<PredCondition, OperationCode> PredicateComparisonTable = {
|
||||
Node ShaderIR::GetPredicateComparisonHalf(Tegra::Shader::PredCondition condition, Node op_a,
|
||||
Node op_b) {
|
||||
const std::unordered_map<PredCondition, OperationCode> PredicateComparisonTable = {
|
||||
{PredCondition::LessThan, OperationCode::Logical2HLessThan},
|
||||
{PredCondition::Equal, OperationCode::Logical2HEqual},
|
||||
{PredCondition::LessEqual, OperationCode::Logical2HLessEqual},
|
||||
{PredCondition::GreaterThan, OperationCode::Logical2HGreaterThan},
|
||||
{PredCondition::NotEqual, OperationCode::Logical2HNotEqual},
|
||||
{PredCondition::GreaterEqual, OperationCode::Logical2HGreaterEqual},
|
||||
{PredCondition::LessThanWithNan, OperationCode::Logical2HLessThan},
|
||||
{PredCondition::NotEqualWithNan, OperationCode::Logical2HNotEqual},
|
||||
{PredCondition::LessEqualWithNan, OperationCode::Logical2HLessEqual},
|
||||
{PredCondition::GreaterThanWithNan, OperationCode::Logical2HGreaterThan},
|
||||
{PredCondition::GreaterEqualWithNan, OperationCode::Logical2HGreaterEqual}};
|
||||
{PredCondition::LessThanWithNan, OperationCode::Logical2HLessThanWithNan},
|
||||
{PredCondition::NotEqualWithNan, OperationCode::Logical2HNotEqualWithNan},
|
||||
{PredCondition::LessEqualWithNan, OperationCode::Logical2HLessEqualWithNan},
|
||||
{PredCondition::GreaterThanWithNan, OperationCode::Logical2HGreaterThanWithNan},
|
||||
{PredCondition::GreaterEqualWithNan, OperationCode::Logical2HGreaterEqualWithNan}};
|
||||
|
||||
const auto comparison{PredicateComparisonTable.find(condition)};
|
||||
UNIMPLEMENTED_IF_MSG(comparison == PredicateComparisonTable.end(),
|
||||
"Unknown predicate comparison operation");
|
||||
|
||||
const Node predicate = Operation(comparison->second, meta, op_a, op_b);
|
||||
const Node predicate = Operation(comparison->second, NO_PRECISE, op_a, op_b);
|
||||
|
||||
return predicate;
|
||||
}
|
||||
|
||||
OperationCode ShaderIR::GetPredicateCombiner(PredOperation operation) {
|
||||
static const std::unordered_map<PredOperation, OperationCode> PredicateOperationTable = {
|
||||
const std::unordered_map<PredOperation, OperationCode> PredicateOperationTable = {
|
||||
{PredOperation::And, OperationCode::LogicalAnd},
|
||||
{PredOperation::Or, OperationCode::LogicalOr},
|
||||
{PredOperation::Xor, OperationCode::LogicalXor},
|
||||
|
@ -109,11 +109,13 @@ enum class OperationCode {
|
||||
UBitfieldExtract, /// (MetaArithmetic, uint value, int offset, int offset) -> uint
|
||||
UBitCount, /// (MetaArithmetic, uint) -> uint
|
||||
|
||||
HAdd, /// (MetaHalfArithmetic, f16vec2 a, f16vec2 b) -> f16vec2
|
||||
HMul, /// (MetaHalfArithmetic, f16vec2 a, f16vec2 b) -> f16vec2
|
||||
HFma, /// (MetaHalfArithmetic, f16vec2 a, f16vec2 b, f16vec2 c) -> f16vec2
|
||||
HAdd, /// (MetaArithmetic, f16vec2 a, f16vec2 b) -> f16vec2
|
||||
HMul, /// (MetaArithmetic, f16vec2 a, f16vec2 b) -> f16vec2
|
||||
HFma, /// (MetaArithmetic, f16vec2 a, f16vec2 b, f16vec2 c) -> f16vec2
|
||||
HAbsolute, /// (f16vec2 a) -> f16vec2
|
||||
HNegate, /// (f16vec2 a, bool first, bool second) -> f16vec2
|
||||
HClamp, /// (f16vec2 src, float min, float max) -> f16vec2
|
||||
HUnpack, /// (Tegra::Shader::HalfType, T value) -> f16vec2
|
||||
HMergeF32, /// (f16vec2 src) -> float
|
||||
HMergeH0, /// (f16vec2 dest, f16vec2 src) -> f16vec2
|
||||
HMergeH1, /// (f16vec2 dest, f16vec2 src) -> f16vec2
|
||||
@ -150,12 +152,18 @@ enum class OperationCode {
|
||||
LogicalUNotEqual, /// (uint a, uint b) -> bool
|
||||
LogicalUGreaterEqual, /// (uint a, uint b) -> bool
|
||||
|
||||
Logical2HLessThan, /// (MetaHalfArithmetic, f16vec2 a, f16vec2) -> bool2
|
||||
Logical2HEqual, /// (MetaHalfArithmetic, f16vec2 a, f16vec2) -> bool2
|
||||
Logical2HLessEqual, /// (MetaHalfArithmetic, f16vec2 a, f16vec2) -> bool2
|
||||
Logical2HGreaterThan, /// (MetaHalfArithmetic, f16vec2 a, f16vec2) -> bool2
|
||||
Logical2HNotEqual, /// (MetaHalfArithmetic, f16vec2 a, f16vec2) -> bool2
|
||||
Logical2HGreaterEqual, /// (MetaHalfArithmetic, f16vec2 a, f16vec2) -> bool2
|
||||
Logical2HLessThan, /// (MetaHalfArithmetic, f16vec2 a, f16vec2) -> bool2
|
||||
Logical2HEqual, /// (MetaHalfArithmetic, f16vec2 a, f16vec2) -> bool2
|
||||
Logical2HLessEqual, /// (MetaHalfArithmetic, f16vec2 a, f16vec2) -> bool2
|
||||
Logical2HGreaterThan, /// (MetaHalfArithmetic, f16vec2 a, f16vec2) -> bool2
|
||||
Logical2HNotEqual, /// (MetaHalfArithmetic, f16vec2 a, f16vec2) -> bool2
|
||||
Logical2HGreaterEqual, /// (MetaHalfArithmetic, f16vec2 a, f16vec2) -> bool2
|
||||
Logical2HLessThanWithNan, /// (MetaHalfArithmetic, f16vec2 a, f16vec2) -> bool2
|
||||
Logical2HEqualWithNan, /// (MetaHalfArithmetic, f16vec2 a, f16vec2) -> bool2
|
||||
Logical2HLessEqualWithNan, /// (MetaHalfArithmetic, f16vec2 a, f16vec2) -> bool2
|
||||
Logical2HGreaterThanWithNan, /// (MetaHalfArithmetic, f16vec2 a, f16vec2) -> bool2
|
||||
Logical2HNotEqualWithNan, /// (MetaHalfArithmetic, f16vec2 a, f16vec2) -> bool2
|
||||
Logical2HGreaterEqualWithNan, /// (MetaHalfArithmetic, f16vec2 a, f16vec2) -> bool2
|
||||
|
||||
Texture, /// (MetaTexture, float[N] coords) -> float4
|
||||
TextureLod, /// (MetaTexture, float[N] coords) -> float4
|
||||
@ -308,13 +316,6 @@ struct MetaArithmetic {
|
||||
bool precise{};
|
||||
};
|
||||
|
||||
struct MetaHalfArithmetic {
|
||||
bool precise{};
|
||||
std::array<Tegra::Shader::HalfType, 3> types = {Tegra::Shader::HalfType::H0_H1,
|
||||
Tegra::Shader::HalfType::H0_H1,
|
||||
Tegra::Shader::HalfType::H0_H1};
|
||||
};
|
||||
|
||||
struct MetaTexture {
|
||||
const Sampler& sampler;
|
||||
Node array{};
|
||||
@ -326,11 +327,10 @@ struct MetaTexture {
|
||||
u32 element{};
|
||||
};
|
||||
|
||||
constexpr MetaArithmetic PRECISE = {true};
|
||||
constexpr MetaArithmetic NO_PRECISE = {false};
|
||||
constexpr MetaHalfArithmetic HALF_NO_PRECISE = {false};
|
||||
inline constexpr MetaArithmetic PRECISE = {true};
|
||||
inline constexpr MetaArithmetic NO_PRECISE = {false};
|
||||
|
||||
using Meta = std::variant<MetaArithmetic, MetaHalfArithmetic, MetaTexture>;
|
||||
using Meta = std::variant<MetaArithmetic, MetaTexture, Tegra::Shader::HalfType>;
|
||||
|
||||
/// Holds any kind of operation that can be done in the IR
|
||||
class OperationNode final {
|
||||
@ -734,10 +734,14 @@ private:
|
||||
|
||||
/// Unpacks a half immediate from an instruction
|
||||
Node UnpackHalfImmediate(Tegra::Shader::Instruction instr, bool has_negation);
|
||||
/// Unpacks a binary value into a half float pair with a type format
|
||||
Node UnpackHalfFloat(Node value, Tegra::Shader::HalfType type);
|
||||
/// Merges a half pair into another value
|
||||
Node HalfMerge(Node dest, Node src, Tegra::Shader::HalfMerge merge);
|
||||
/// Conditionally absolute/negated half float pair. Absolute is applied first
|
||||
Node GetOperandAbsNegHalf(Node value, bool absolute, bool negate);
|
||||
/// Conditionally saturates a half float pair
|
||||
Node GetSaturatedHalfFloat(Node value, bool saturate = true);
|
||||
|
||||
/// Returns a predicate comparing two floats
|
||||
Node GetPredicateComparisonFloat(Tegra::Shader::PredCondition condition, Node op_a, Node op_b);
|
||||
@ -745,8 +749,7 @@ private:
|
||||
Node GetPredicateComparisonInteger(Tegra::Shader::PredCondition condition, bool is_signed,
|
||||
Node op_a, Node op_b);
|
||||
/// Returns a predicate comparing two half floats. meta consumes how both pairs will be compared
|
||||
Node GetPredicateComparisonHalf(Tegra::Shader::PredCondition condition,
|
||||
const MetaHalfArithmetic& meta, Node op_a, Node op_b);
|
||||
Node GetPredicateComparisonHalf(Tegra::Shader::PredCondition condition, Node op_a, Node op_b);
|
||||
|
||||
/// Returns a predicate combiner operation
|
||||
OperationCode GetPredicateCombiner(Tegra::Shader::PredOperation operation);
|
||||
|
Loading…
Reference in New Issue
Block a user