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https://github.com/yuzu-emu/yuzu.git
synced 2024-08-23 16:57:19 +02:00
Fix exception propagation for VFP single precision
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7dde13f875
commit
693cca8f1f
@ -271,8 +271,9 @@ inline int vfp_single_type(const vfp_single* s)
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// Unpack a single-precision float. Note that this returns the magnitude
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// of the single-precision float mantissa with the 1. if necessary,
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// aligned to bit 30.
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inline void vfp_single_unpack(vfp_single* s, s32 val, u32* fpscr)
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inline u32 vfp_single_unpack(vfp_single* s, s32 val, u32 fpscr)
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{
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u32 exceptions = 0;
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s->sign = vfp_single_packed_sign(val) >> 16,
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s->exponent = vfp_single_packed_exponent(val);
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@ -283,12 +284,13 @@ inline void vfp_single_unpack(vfp_single* s, s32 val, u32* fpscr)
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// If flush-to-zero mode is enabled, turn the denormal into zero.
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// On a VFPv2 architecture, the sign of the zero is always positive.
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if ((*fpscr & FPSCR_FLUSH_TO_ZERO) != 0 && (vfp_single_type(s) & VFP_DENORMAL) != 0) {
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if ((fpscr & FPSCR_FLUSH_TO_ZERO) != 0 && (vfp_single_type(s) & VFP_DENORMAL) != 0) {
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s->sign = 0;
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s->exponent = 0;
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s->significand = 0;
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*fpscr |= FPSCR_IDC;
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exceptions |= FPSCR_IDC;
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}
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return exceptions;
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}
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// Re-pack a single-precision float. This assumes that the float is
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@ -334,8 +334,9 @@ static u32 vfp_single_fsqrt(ARMul_State* state, int sd, int unused, s32 m, u32 f
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{
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struct vfp_single vsm, vsd, *vsp;
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int ret, tm;
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u32 exceptions = 0;
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vfp_single_unpack(&vsm, m, &fpscr);
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exceptions |= vfp_single_unpack(&vsm, m, fpscr);
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tm = vfp_single_type(&vsm);
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if (tm & (VFP_NAN|VFP_INFINITY)) {
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vsp = &vsd;
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@ -408,7 +409,9 @@ sqrt_invalid:
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}
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vsd.significand = vfp_shiftright32jamming(vsd.significand, 1);
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return vfp_single_normaliseround(state, sd, &vsd, fpscr, 0, "fsqrt");
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exceptions |= vfp_single_normaliseround(state, sd, &vsd, fpscr, 0, "fsqrt");
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return exceptions;
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}
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/*
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@ -503,7 +506,7 @@ static u32 vfp_single_fcvtd(ARMul_State* state, int dd, int unused, s32 m, u32 f
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int tm;
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u32 exceptions = 0;
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vfp_single_unpack(&vsm, m, &fpscr);
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exceptions |= vfp_single_unpack(&vsm, m, fpscr);
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tm = vfp_single_type(&vsm);
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@ -511,7 +514,7 @@ static u32 vfp_single_fcvtd(ARMul_State* state, int dd, int unused, s32 m, u32 f
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* If we have a signalling NaN, signal invalid operation.
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*/
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if (tm == VFP_SNAN)
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exceptions = FPSCR_IOC;
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exceptions |= FPSCR_IOC;
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if (tm & VFP_DENORMAL)
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vfp_single_normalise_denormal(&vsm);
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@ -568,7 +571,7 @@ static u32 vfp_single_ftoui(ARMul_State* state, int sd, int unused, s32 m, u32 f
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int rmode = fpscr & FPSCR_RMODE_MASK;
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int tm;
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vfp_single_unpack(&vsm, m, &fpscr);
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exceptions |= vfp_single_unpack(&vsm, m, fpscr);
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vfp_single_dump("VSM", &vsm);
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/*
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@ -583,7 +586,7 @@ static u32 vfp_single_ftoui(ARMul_State* state, int sd, int unused, s32 m, u32 f
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if (vsm.exponent >= 127 + 32) {
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d = vsm.sign ? 0 : 0xffffffff;
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exceptions = FPSCR_IOC;
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exceptions |= FPSCR_IOC;
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} else if (vsm.exponent >= 127) {
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int shift = 127 + 31 - vsm.exponent;
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u32 rem, incr = 0;
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@ -648,7 +651,7 @@ static u32 vfp_single_ftosi(ARMul_State* state, int sd, int unused, s32 m, u32 f
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int rmode = fpscr & FPSCR_RMODE_MASK;
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int tm;
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vfp_single_unpack(&vsm, m, &fpscr);
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exceptions |= vfp_single_unpack(&vsm, m, fpscr);
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vfp_single_dump("VSM", &vsm);
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/*
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@ -774,7 +777,7 @@ vfp_single_fadd_nonnumber(struct vfp_single *vsd, struct vfp_single *vsn,
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/*
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* different signs -> invalid
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*/
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exceptions = FPSCR_IOC;
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exceptions |= FPSCR_IOC;
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vsp = &vfp_single_default_qnan;
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} else {
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/*
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@ -921,27 +924,27 @@ static u32
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vfp_single_multiply_accumulate(ARMul_State* state, int sd, int sn, s32 m, u32 fpscr, u32 negate, const char *func)
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{
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vfp_single vsd, vsp, vsn, vsm;
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u32 exceptions;
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u32 exceptions = 0;
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s32 v;
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v = vfp_get_float(state, sn);
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LOG_TRACE(Core_ARM11, "s%u = %08x", sn, v);
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vfp_single_unpack(&vsn, v, &fpscr);
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exceptions |= vfp_single_unpack(&vsn, v, fpscr);
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if (vsn.exponent == 0 && vsn.significand)
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vfp_single_normalise_denormal(&vsn);
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vfp_single_unpack(&vsm, m, &fpscr);
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exceptions |= vfp_single_unpack(&vsm, m, fpscr);
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if (vsm.exponent == 0 && vsm.significand)
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vfp_single_normalise_denormal(&vsm);
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exceptions = vfp_single_multiply(&vsp, &vsn, &vsm, fpscr);
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exceptions |= vfp_single_multiply(&vsp, &vsn, &vsm, fpscr);
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if (negate & NEG_MULTIPLY)
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vsp.sign = vfp_sign_negate(vsp.sign);
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v = vfp_get_float(state, sd);
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LOG_TRACE(Core_ARM11, "s%u = %08x", sd, v);
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vfp_single_unpack(&vsn, v, &fpscr);
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exceptions |= vfp_single_unpack(&vsn, v, fpscr);
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if (vsn.exponent == 0 && vsn.significand != 0)
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vfp_single_normalise_denormal(&vsn);
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@ -1000,20 +1003,20 @@ static u32 vfp_single_fnmsc(ARMul_State* state, int sd, int sn, s32 m, u32 fpscr
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static u32 vfp_single_fmul(ARMul_State* state, int sd, int sn, s32 m, u32 fpscr)
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{
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struct vfp_single vsd, vsn, vsm;
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u32 exceptions;
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u32 exceptions = 0;
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s32 n = vfp_get_float(state, sn);
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LOG_TRACE(Core_ARM11, "s%u = %08x", sn, n);
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vfp_single_unpack(&vsn, n, &fpscr);
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exceptions |= vfp_single_unpack(&vsn, n, fpscr);
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if (vsn.exponent == 0 && vsn.significand)
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vfp_single_normalise_denormal(&vsn);
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vfp_single_unpack(&vsm, m, &fpscr);
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exceptions |= vfp_single_unpack(&vsm, m, fpscr);
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if (vsm.exponent == 0 && vsm.significand)
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vfp_single_normalise_denormal(&vsm);
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exceptions = vfp_single_multiply(&vsd, &vsn, &vsm, fpscr);
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exceptions |= vfp_single_multiply(&vsd, &vsn, &vsm, fpscr);
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return vfp_single_normaliseround(state, sd, &vsd, fpscr, exceptions, "fmul");
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}
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@ -1023,20 +1026,20 @@ static u32 vfp_single_fmul(ARMul_State* state, int sd, int sn, s32 m, u32 fpscr)
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static u32 vfp_single_fnmul(ARMul_State* state, int sd, int sn, s32 m, u32 fpscr)
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{
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struct vfp_single vsd, vsn, vsm;
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u32 exceptions;
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u32 exceptions = 0;
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s32 n = vfp_get_float(state, sn);
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LOG_TRACE(Core_ARM11, "s%u = %08x", sn, n);
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vfp_single_unpack(&vsn, n, &fpscr);
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exceptions |= vfp_single_unpack(&vsn, n, fpscr);
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if (vsn.exponent == 0 && vsn.significand)
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vfp_single_normalise_denormal(&vsn);
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vfp_single_unpack(&vsm, m, &fpscr);
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exceptions |= vfp_single_unpack(&vsm, m, fpscr);
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if (vsm.exponent == 0 && vsm.significand)
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vfp_single_normalise_denormal(&vsm);
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exceptions = vfp_single_multiply(&vsd, &vsn, &vsm, fpscr);
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exceptions |= vfp_single_multiply(&vsd, &vsn, &vsm, fpscr);
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vsd.sign = vfp_sign_negate(vsd.sign);
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return vfp_single_normaliseround(state, sd, &vsd, fpscr, exceptions, "fnmul");
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}
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@ -1047,7 +1050,7 @@ static u32 vfp_single_fnmul(ARMul_State* state, int sd, int sn, s32 m, u32 fpscr
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static u32 vfp_single_fadd(ARMul_State* state, int sd, int sn, s32 m, u32 fpscr)
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{
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struct vfp_single vsd, vsn, vsm;
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u32 exceptions;
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u32 exceptions = 0;
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s32 n = vfp_get_float(state, sn);
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LOG_TRACE(Core_ARM11, "s%u = %08x", sn, n);
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@ -1055,15 +1058,15 @@ static u32 vfp_single_fadd(ARMul_State* state, int sd, int sn, s32 m, u32 fpscr)
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/*
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* Unpack and normalise denormals.
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*/
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vfp_single_unpack(&vsn, n, &fpscr);
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exceptions |= vfp_single_unpack(&vsn, n, fpscr);
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if (vsn.exponent == 0 && vsn.significand)
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vfp_single_normalise_denormal(&vsn);
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vfp_single_unpack(&vsm, m, &fpscr);
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exceptions |= vfp_single_unpack(&vsm, m, fpscr);
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if (vsm.exponent == 0 && vsm.significand)
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vfp_single_normalise_denormal(&vsm);
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exceptions = vfp_single_add(&vsd, &vsn, &vsm, fpscr);
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exceptions |= vfp_single_add(&vsd, &vsn, &vsm, fpscr);
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return vfp_single_normaliseround(state, sd, &vsd, fpscr, exceptions, "fadd");
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}
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@ -1095,8 +1098,8 @@ static u32 vfp_single_fdiv(ARMul_State* state, int sd, int sn, s32 m, u32 fpscr)
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LOG_TRACE(Core_ARM11, "s%u = %08x", sn, n);
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vfp_single_unpack(&vsn, n, &fpscr);
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vfp_single_unpack(&vsm, m, &fpscr);
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exceptions |= vfp_single_unpack(&vsn, n, fpscr);
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exceptions |= vfp_single_unpack(&vsm, m, fpscr);
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vsd.sign = vsn.sign ^ vsm.sign;
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@ -1165,13 +1168,13 @@ static u32 vfp_single_fdiv(ARMul_State* state, int sd, int sn, s32 m, u32 fpscr)
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return vfp_single_normaliseround(state, sd, &vsd, fpscr, 0, "fdiv");
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vsn_nan:
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exceptions = vfp_propagate_nan(&vsd, &vsn, &vsm, fpscr);
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exceptions |= vfp_propagate_nan(&vsd, &vsn, &vsm, fpscr);
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pack:
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vfp_put_float(state, vfp_single_pack(&vsd), sd);
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return exceptions;
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vsm_nan:
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exceptions = vfp_propagate_nan(&vsd, &vsm, &vsn, fpscr);
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exceptions |= vfp_propagate_nan(&vsd, &vsm, &vsn, fpscr);
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goto pack;
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zero:
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@ -1180,7 +1183,7 @@ zero:
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goto pack;
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divzero:
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exceptions = FPSCR_DZC;
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exceptions |= FPSCR_DZC;
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infinity:
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vsd.exponent = 255;
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vsd.significand = 0;
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