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https://github.com/yuzu-emu/yuzu.git
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Merge pull request #8490 from liamwhite/read-code-stop
dynarmic: Stop ReadCode callbacks to unmapped addresses
This commit is contained in:
commit
78ce053b4d
2
externals/dynarmic
vendored
2
externals/dynarmic
vendored
@ -1 +1 @@
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Subproject commit 5ad1d02351bf4fee681a3d701d210b419f41a505
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Subproject commit 7f84870712ac2fe06aa62dc2bebbe46b51a2cc2e
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@ -119,16 +119,23 @@ void ARM_Interface::Run() {
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}
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}
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system.ExitDynarmicProfile();
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system.ExitDynarmicProfile();
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// Notify the debugger and go to sleep if a breakpoint was hit.
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// Notify the debugger and go to sleep if a breakpoint was hit,
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if (Has(hr, breakpoint)) {
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// or if the thread is unable to continue for any reason.
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if (Has(hr, breakpoint) || Has(hr, no_execute)) {
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RewindBreakpointInstruction();
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RewindBreakpointInstruction();
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if (system.DebuggerEnabled()) {
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system.GetDebugger().NotifyThreadStopped(current_thread);
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system.GetDebugger().NotifyThreadStopped(current_thread);
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current_thread->RequestSuspend(SuspendType::Debug);
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}
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current_thread->RequestSuspend(Kernel::SuspendType::Debug);
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break;
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break;
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}
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}
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// Notify the debugger and go to sleep if a watchpoint was hit.
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if (Has(hr, watchpoint)) {
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if (Has(hr, watchpoint)) {
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RewindBreakpointInstruction();
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RewindBreakpointInstruction();
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if (system.DebuggerEnabled()) {
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system.GetDebugger().NotifyThreadWatchpoint(current_thread, *HaltedWatchpoint());
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system.GetDebugger().NotifyThreadWatchpoint(current_thread, *HaltedWatchpoint());
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}
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current_thread->RequestSuspend(SuspendType::Debug);
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current_thread->RequestSuspend(SuspendType::Debug);
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break;
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break;
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}
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}
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@ -204,6 +204,7 @@ public:
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static constexpr Dynarmic::HaltReason svc_call = Dynarmic::HaltReason::UserDefined3;
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static constexpr Dynarmic::HaltReason svc_call = Dynarmic::HaltReason::UserDefined3;
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static constexpr Dynarmic::HaltReason breakpoint = Dynarmic::HaltReason::UserDefined4;
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static constexpr Dynarmic::HaltReason breakpoint = Dynarmic::HaltReason::UserDefined4;
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static constexpr Dynarmic::HaltReason watchpoint = Dynarmic::HaltReason::UserDefined5;
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static constexpr Dynarmic::HaltReason watchpoint = Dynarmic::HaltReason::UserDefined5;
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static constexpr Dynarmic::HaltReason no_execute = Dynarmic::HaltReason::UserDefined6;
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protected:
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protected:
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/// System context that this ARM interface is running under.
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/// System context that this ARM interface is running under.
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@ -48,6 +48,12 @@ public:
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CheckMemoryAccess(vaddr, 8, Kernel::DebugWatchpointType::Read);
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CheckMemoryAccess(vaddr, 8, Kernel::DebugWatchpointType::Read);
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return memory.Read64(vaddr);
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return memory.Read64(vaddr);
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}
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}
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std::optional<u32> MemoryReadCode(u32 vaddr) override {
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if (!memory.IsValidVirtualAddressRange(vaddr, sizeof(u32))) {
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return std::nullopt;
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}
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return MemoryRead32(vaddr);
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}
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void MemoryWrite8(u32 vaddr, u8 value) override {
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void MemoryWrite8(u32 vaddr, u8 value) override {
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if (CheckMemoryAccess(vaddr, 1, Kernel::DebugWatchpointType::Write)) {
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if (CheckMemoryAccess(vaddr, 1, Kernel::DebugWatchpointType::Write)) {
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@ -89,21 +95,28 @@ public:
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void InterpreterFallback(u32 pc, std::size_t num_instructions) override {
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void InterpreterFallback(u32 pc, std::size_t num_instructions) override {
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parent.LogBacktrace();
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parent.LogBacktrace();
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UNIMPLEMENTED_MSG("This should never happen, pc = {:08X}, code = {:08X}", pc,
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LOG_ERROR(Core_ARM,
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MemoryReadCode(pc));
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"Unimplemented instruction @ 0x{:X} for {} instructions (instr = {:08X})", pc,
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num_instructions, MemoryRead32(pc));
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}
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}
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void ExceptionRaised(u32 pc, Dynarmic::A32::Exception exception) override {
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void ExceptionRaised(u32 pc, Dynarmic::A32::Exception exception) override {
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switch (exception) {
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case Dynarmic::A32::Exception::NoExecuteFault:
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LOG_CRITICAL(Core_ARM, "Cannot execute instruction at unmapped address {:#08x}", pc);
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ReturnException(pc, ARM_Interface::no_execute);
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return;
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default:
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if (debugger_enabled) {
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if (debugger_enabled) {
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parent.SaveContext(parent.breakpoint_context);
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ReturnException(pc, ARM_Interface::breakpoint);
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parent.jit.load()->HaltExecution(ARM_Interface::breakpoint);
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return;
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return;
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}
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}
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parent.LogBacktrace();
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parent.LogBacktrace();
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LOG_CRITICAL(Core_ARM,
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LOG_CRITICAL(Core_ARM,
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"ExceptionRaised(exception = {}, pc = {:08X}, code = {:08X}, thumb = {})",
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"ExceptionRaised(exception = {}, pc = {:08X}, code = {:08X}, thumb = {})",
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exception, pc, MemoryReadCode(pc), parent.IsInThumbMode());
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exception, pc, MemoryRead32(pc), parent.IsInThumbMode());
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}
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}
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}
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void CallSVC(u32 swi) override {
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void CallSVC(u32 swi) override {
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@ -141,15 +154,20 @@ public:
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const auto match{parent.MatchingWatchpoint(addr, size, type)};
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const auto match{parent.MatchingWatchpoint(addr, size, type)};
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if (match) {
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if (match) {
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parent.SaveContext(parent.breakpoint_context);
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parent.jit.load()->HaltExecution(ARM_Interface::watchpoint);
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parent.halted_watchpoint = match;
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parent.halted_watchpoint = match;
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ReturnException(parent.jit.load()->Regs()[15], ARM_Interface::watchpoint);
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return false;
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return false;
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}
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}
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return true;
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return true;
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}
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}
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void ReturnException(u32 pc, Dynarmic::HaltReason hr) {
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parent.SaveContext(parent.breakpoint_context);
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parent.breakpoint_context.cpu_registers[15] = pc;
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parent.jit.load()->HaltExecution(hr);
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}
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ARM_Dynarmic_32& parent;
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ARM_Dynarmic_32& parent;
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Core::Memory::Memory& memory;
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Core::Memory::Memory& memory;
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std::size_t num_interpreted_instructions{};
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std::size_t num_interpreted_instructions{};
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@ -52,6 +52,12 @@ public:
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CheckMemoryAccess(vaddr, 16, Kernel::DebugWatchpointType::Read);
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CheckMemoryAccess(vaddr, 16, Kernel::DebugWatchpointType::Read);
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return {memory.Read64(vaddr), memory.Read64(vaddr + 8)};
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return {memory.Read64(vaddr), memory.Read64(vaddr + 8)};
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}
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}
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std::optional<u32> MemoryReadCode(u64 vaddr) override {
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if (!memory.IsValidVirtualAddressRange(vaddr, sizeof(u32))) {
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return std::nullopt;
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}
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return MemoryRead32(vaddr);
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}
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void MemoryWrite8(u64 vaddr, u8 value) override {
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void MemoryWrite8(u64 vaddr, u8 value) override {
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if (CheckMemoryAccess(vaddr, 1, Kernel::DebugWatchpointType::Write)) {
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if (CheckMemoryAccess(vaddr, 1, Kernel::DebugWatchpointType::Write)) {
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@ -105,7 +111,7 @@ public:
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parent.LogBacktrace();
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parent.LogBacktrace();
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LOG_ERROR(Core_ARM,
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LOG_ERROR(Core_ARM,
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"Unimplemented instruction @ 0x{:X} for {} instructions (instr = {:08X})", pc,
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"Unimplemented instruction @ 0x{:X} for {} instructions (instr = {:08X})", pc,
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num_instructions, MemoryReadCode(pc));
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num_instructions, MemoryRead32(pc));
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}
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}
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void InstructionCacheOperationRaised(Dynarmic::A64::InstructionCacheOperation op,
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void InstructionCacheOperationRaised(Dynarmic::A64::InstructionCacheOperation op,
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@ -138,16 +144,19 @@ public:
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case Dynarmic::A64::Exception::SendEventLocal:
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case Dynarmic::A64::Exception::SendEventLocal:
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case Dynarmic::A64::Exception::Yield:
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case Dynarmic::A64::Exception::Yield:
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return;
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return;
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case Dynarmic::A64::Exception::NoExecuteFault:
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LOG_CRITICAL(Core_ARM, "Cannot execute instruction at unmapped address {:#016x}", pc);
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ReturnException(pc, ARM_Interface::no_execute);
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return;
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default:
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default:
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if (debugger_enabled) {
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if (debugger_enabled) {
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parent.SaveContext(parent.breakpoint_context);
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ReturnException(pc, ARM_Interface::breakpoint);
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parent.jit.load()->HaltExecution(ARM_Interface::breakpoint);
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return;
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return;
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}
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}
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parent.LogBacktrace();
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parent.LogBacktrace();
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ASSERT_MSG(false, "ExceptionRaised(exception = {}, pc = {:08X}, code = {:08X})",
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LOG_CRITICAL(Core_ARM, "ExceptionRaised(exception = {}, pc = {:08X}, code = {:08X})",
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static_cast<std::size_t>(exception), pc, MemoryReadCode(pc));
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static_cast<std::size_t>(exception), pc, MemoryRead32(pc));
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}
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}
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}
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}
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@ -188,15 +197,20 @@ public:
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const auto match{parent.MatchingWatchpoint(addr, size, type)};
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const auto match{parent.MatchingWatchpoint(addr, size, type)};
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if (match) {
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if (match) {
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parent.SaveContext(parent.breakpoint_context);
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parent.jit.load()->HaltExecution(ARM_Interface::watchpoint);
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parent.halted_watchpoint = match;
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parent.halted_watchpoint = match;
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ReturnException(parent.jit.load()->GetPC(), ARM_Interface::watchpoint);
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return false;
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return false;
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}
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}
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return true;
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return true;
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}
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}
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void ReturnException(u64 pc, Dynarmic::HaltReason hr) {
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parent.SaveContext(parent.breakpoint_context);
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parent.breakpoint_context.pc = pc;
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parent.jit.load()->HaltExecution(hr);
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}
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ARM_Dynarmic_64& parent;
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ARM_Dynarmic_64& parent;
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Core::Memory::Memory& memory;
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Core::Memory::Memory& memory;
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u64 tpidrro_el0 = 0;
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u64 tpidrro_el0 = 0;
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