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Added exclusive reservation granule from ARMv7 spec to dyncom to protect LDR/STREX.
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9ac2272e25
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@ -63,16 +63,21 @@ extern void switch_mode(arm_core_t *core, uint32_t mode);
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typedef arm_core_t arm_processor;
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typedef unsigned int (*shtop_fp_t)(arm_processor *cpu, unsigned int sht_oper);
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// Defines a reservation granule of 2 words, which protects the first 2 words starting at the tag.
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// This is the smallest granule allowed by the v7 spec, and is coincidentally just large enough to
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// support LDR/STREXD.
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static const ARMword RESERVATION_GRANULE_MASK = 0xFFFFFFF8;
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// Exclusive memory access
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static int exclusive_detect(ARMul_State* state, ARMword addr){
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if(state->exclusive_tag == addr)
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if(state->exclusive_tag == (addr & RESERVATION_GRANULE_MASK))
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return 0;
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else
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return -1;
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}
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static void add_exclusive_addr(ARMul_State* state, ARMword addr){
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state->exclusive_tag = addr;
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state->exclusive_tag = addr & RESERVATION_GRANULE_MASK;
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return;
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}
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@ -80,7 +85,6 @@ static void remove_exclusive(ARMul_State* state, ARMword addr){
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state->exclusive_tag = 0xFFFFFFFF;
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}
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unsigned int DPO(Immediate)(arm_processor *cpu, unsigned int sht_oper) {
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unsigned int immed_8 = BITS(sht_oper, 0, 7);
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unsigned int rotate_imm = BITS(sht_oper, 8, 11);
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@ -4551,7 +4555,6 @@ unsigned InterpreterMainLoop(ARMul_State* state) {
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add_exclusive_addr(cpu, read_addr);
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cpu->exclusive_state = 1;
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// TODO(bunnei): Do we need to also make [read_addr + 4] exclusive?
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RD = Memory::Read32(read_addr);
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RD2 = Memory::Read32(read_addr + 4);
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@ -5978,7 +5981,6 @@ unsigned InterpreterMainLoop(ARMul_State* state) {
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if ((exclusive_detect(cpu, write_addr) == 0) && (cpu->exclusive_state == 1)) {
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remove_exclusive(cpu, write_addr);
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cpu->exclusive_state = 0;
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// TODO(bunnei): Remove exclusive from [write_addr + 4] if we implement this in LDREXD
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Memory::Write32(write_addr, cpu->Reg[inst_cream->Rm]);
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Memory::Write32(write_addr + 4, cpu->Reg[inst_cream->Rm + 1]);
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@ -162,20 +162,20 @@ struct ARMul_State
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unsigned ErrorCode; /* type of illegal instruction */
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/* Order of the following register should not be modified */
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ARMword Reg[16]; /* the current register file */
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ARMword Cpsr; /* the current psr */
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ARMword Reg[16]; /* the current register file */
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ARMword Cpsr; /* the current psr */
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ARMword Spsr_copy;
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ARMword phys_pc;
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ARMword Reg_usr[2];
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ARMword Reg_svc[2]; /* R13_SVC R14_SVC */
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ARMword Reg_abort[2]; /* R13_ABORT R14_ABORT */
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ARMword Reg_undef[2]; /* R13 UNDEF R14 UNDEF */
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ARMword Reg_irq[2]; /* R13_IRQ R14_IRQ */
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ARMword Reg_firq[7]; /* R8---R14 FIRQ */
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ARMword Spsr[7]; /* the exception psr's */
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ARMword Mode; /* the current mode */
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ARMword Bank; /* the current register bank */
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ARMword exclusive_tag;
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ARMword Reg_svc[2]; /* R13_SVC R14_SVC */
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ARMword Reg_abort[2]; /* R13_ABORT R14_ABORT */
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ARMword Reg_undef[2]; /* R13 UNDEF R14 UNDEF */
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ARMword Reg_irq[2]; /* R13_IRQ R14_IRQ */
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ARMword Reg_firq[7]; /* R8---R14 FIRQ */
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ARMword Spsr[7]; /* the exception psr's */
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ARMword Mode; /* the current mode */
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ARMword Bank; /* the current register bank */
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ARMword exclusive_tag; /* the address for which the local monitor is in exclusive access mode */
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ARMword exclusive_state;
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ARMword exclusive_result;
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ARMword CP15[VFP_BASE - CP15_BASE];
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