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dyncom: Use std::array for register arrays
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0ecc6e2f04
commit
816b1ca776
@ -82,8 +82,8 @@ void ARM_DynCom::ResetContext(Core::ThreadContext& context, u32 stack_top, u32 e
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}
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void ARM_DynCom::SaveContext(Core::ThreadContext& ctx) {
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memcpy(ctx.cpu_registers, state->Reg, sizeof(ctx.cpu_registers));
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memcpy(ctx.fpu_registers, state->ExtReg, sizeof(ctx.fpu_registers));
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memcpy(ctx.cpu_registers, state->Reg.data(), sizeof(ctx.cpu_registers));
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memcpy(ctx.fpu_registers, state->ExtReg.data(), sizeof(ctx.fpu_registers));
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ctx.sp = state->Reg[13];
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ctx.lr = state->Reg[14];
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@ -95,8 +95,8 @@ void ARM_DynCom::SaveContext(Core::ThreadContext& ctx) {
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}
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void ARM_DynCom::LoadContext(const Core::ThreadContext& ctx) {
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memcpy(state->Reg, ctx.cpu_registers, sizeof(ctx.cpu_registers));
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memcpy(state->ExtReg, ctx.fpu_registers, sizeof(ctx.fpu_registers));
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memcpy(state->Reg.data(), ctx.cpu_registers, sizeof(ctx.cpu_registers));
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memcpy(state->ExtReg.data(), ctx.fpu_registers, sizeof(ctx.fpu_registers));
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state->Reg[13] = ctx.sp;
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state->Reg[14] = ctx.lr;
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@ -17,6 +17,7 @@
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#pragma once
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#include <array>
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#include <unordered_map>
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#include "common/common_types.h"
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@ -141,7 +142,7 @@ enum {
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RUN = 3 // Continuous execution
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};
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#define VFP_REG_NUM 64
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struct ARMul_State final
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{
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public:
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@ -177,34 +178,34 @@ public:
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return TFlag ? 2 : 4;
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}
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u32 Emulate; // To start and stop emulation
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// Order of the following register should not be modified
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u32 Reg[16]; // The current register file
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u32 Cpsr; // The current PSR
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u32 Spsr_copy;
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u32 phys_pc;
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u32 Reg_usr[2];
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u32 Reg_svc[2]; // R13_SVC R14_SVC
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u32 Reg_abort[2]; // R13_ABORT R14_ABORT
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u32 Reg_undef[2]; // R13 UNDEF R14 UNDEF
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u32 Reg_irq[2]; // R13_IRQ R14_IRQ
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u32 Reg_firq[7]; // R8---R14 FIRQ
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u32 Spsr[7]; // The exception psr's
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u32 Mode; // The current mode
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u32 Bank; // The current register bank
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u32 exclusive_tag; // The address for which the local monitor is in exclusive access mode
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u32 exclusive_state;
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u32 exclusive_result;
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u32 CP15[CP15_REGISTER_COUNT];
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std::array<u32, 16> Reg; // The current register file
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std::array<u32, 2> Reg_usr;
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std::array<u32, 2> Reg_svc; // R13_SVC R14_SVC
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std::array<u32, 2> Reg_abort; // R13_ABORT R14_ABORT
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std::array<u32, 2> Reg_undef; // R13 UNDEF R14 UNDEF
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std::array<u32, 2> Reg_irq; // R13_IRQ R14_IRQ
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std::array<u32, 7> Reg_firq; // R8---R14 FIRQ
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std::array<u32, 7> Spsr; // The exception psr's
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std::array<u32, CP15_REGISTER_COUNT> CP15;
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// FPSID, FPSCR, and FPEXC
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u32 VFP[VFP_SYSTEM_REGISTER_COUNT];
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std::array<u32, VFP_SYSTEM_REGISTER_COUNT> VFP;
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// VFPv2 and VFPv3-D16 has 16 doubleword registers (D0-D16 or S0-S31).
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// VFPv3-D32/ASIMD may have up to 32 doubleword registers (D0-D31),
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// and only 32 singleword registers are accessible (S0-S31).
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u32 ExtReg[VFP_REG_NUM];
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/* ---- End of the ordered registers ---- */
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std::array<u32, 64> ExtReg;
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u32 Emulate; // To start and stop emulation
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u32 Cpsr; // The current PSR
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u32 Spsr_copy;
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u32 phys_pc;
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u32 Mode; // The current mode
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u32 Bank; // The current register bank
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u32 exclusive_tag; // The address for which the local monitor is in exclusive access mode
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u32 exclusive_state;
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u32 exclusive_result;
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u32 NFlag, ZFlag, CFlag, VFlag, IFFlags; // Dummy flags for speed
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unsigned int shifter_carry_out;
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